[go: up one dir, main page]

JPS60175260A - Digital audio recorder - Google Patents

Digital audio recorder

Info

Publication number
JPS60175260A
JPS60175260A JP3212384A JP3212384A JPS60175260A JP S60175260 A JPS60175260 A JP S60175260A JP 3212384 A JP3212384 A JP 3212384A JP 3212384 A JP3212384 A JP 3212384A JP S60175260 A JPS60175260 A JP S60175260A
Authority
JP
Japan
Prior art keywords
bits
data
bit
frame
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3212384A
Other languages
Japanese (ja)
Other versions
JPH0581996B2 (en
Inventor
Yoshiharu Osuga
由治 大須賀
Takeshi Onishi
健 大西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3212384A priority Critical patent/JPS60175260A/en
Publication of JPS60175260A publication Critical patent/JPS60175260A/en
Publication of JPH0581996B2 publication Critical patent/JPH0581996B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

PURPOSE:To reduce the cost of a data processing circuit and to simplify an overall system structure by having the same contents for bits of a frame of time codes and treating the remaining bits as dummies. CONSTITUTION:The bit constitutions are shown by (a) and (b) for each frame of time codes with fs=44.1kHz and fs=48kHz respectively. That is, SYNC1 consist of 8 bits and CRC2 includes 32 bits (3) showing the time data and 42 bits (4) which can supply other data respectively. When fs=48kHz is satisfied, a 2 bit dummy bit 5 is added in addition to the bit contents. Thus the 8 bits of the SYNC are detected with either one of two types of fs. Hereafter 32 bits of the time data and 42 bits of data are supplied through the CRC. Then the supplied time data and data can be processed when necessary as long as the CRC check is approved.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明け、任意のビットで構成されたタイムコードの
フレームが数棟類混在しても、ビットのデータを1つの
データ処理の方法で判定することかできるディジタルオ
ーディオレコーダに関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] According to the present invention, even if several time code frames composed of arbitrary bits coexist, the bit data can be determined using one data processing method. This invention relates to a digital audio recorder that can be used to record audio files.

〔従来技術〕[Prior art]

従来この棟の装置として、例えは磁気テープにディジタ
ル記録するタイムコードを30H2とし、サンプリング
周波数(以下で8と略す)が44.1kH2と48kH
zの2超りの場合全力え、フレーム長1に100ビツト
+JiJ後としたとき、谷f3に対−するフレーム長全
計算すると、fS −44,1kHzの場合、従って1
フレーム当り98ビツトとなり、fs−48kH2の場
合・ 従って1フレーム当り100ビツトとなる。
Conventionally, the equipment in this building has a time code of 30H2 for digital recording on magnetic tape, and a sampling frequency (hereinafter abbreviated as 8) of 44.1kHz and 48kHz.
When z is more than 2, the full length is set, and the frame length is 1 after 100 bits + JiJ.If the total frame length for valley f3 is calculated, fS is -44, and in the case of 1kHz, it is therefore 1
There are 98 bits per frame, and in the case of fs-48kHz2, there are 100 bits per frame.

第1図に各fs K対する1フレーム当りのビット構成
を承す、 (a)図がfs=44.1kH2の場合で、
(b1図がfS−48kH2の場合である。lフレーム
の始まりを示す同期[5号(以下5YNQと称す) f
i+は8ビツト、人力データが正しく入力されたかをチ
ェックする誤り検出符号(以下ORCと称す) +2+
u 16ビツト、タイムデータf31ハ32ビットとそ
れぞれ同一ビット数で構成されているが、その他データ
を入力することができるデータ領域(4)に、fs−4
4,1KHzの場合ハ42ビット、fs=48KHzの
場合は44ピツトで構成されている。従って各ビットの
データi処1ilfるのけ、fBが埃在どちらのモード
となっているか全判定したあと、BYNOの8ビツトを
検出して、以下タイムデータとデ゛−タ(I−ORCk
通して人力し、ORCチェックがOKとなれは、入力さ
れたタイムデータ、データ會必要に応じて処理する。な
お、この場合、fs=44.1KHzであれば入力情報
のビット数け、タイムデータ32ビツトとデータ42ビ
ツトである几め合計74ビット11.j怠され、f 8
=48KH2であれば、入カイ青報のビット数は合計7
6ビツト用意される。
Figure 1 shows the bit configuration per frame for each fs K. (a) The figure is for fs = 44.1kHz2,
(Figure b1 is for fS-48kHz2. Synchronization [No. 5 (hereinafter referred to as 5YNQ)] indicating the start of l frame f
i+ is an 8-bit error detection code (hereinafter referred to as ORC) that checks whether manual data has been input correctly.
The fs-4 is configured with the same number of bits as the u 16 bits and the time data f31 and 32 bits, but the data area (4) where other data can be input is
In the case of fs=4.1 KHz, it consists of 42 bits, and in the case of fs=48 KHz, it consists of 44 pits. Therefore, after processing the data i for each bit and fully determining which mode fB is in, the BYNO 8 bits are detected, and the following time data and data (I-ORCk
If the ORC check is OK, the input time data and data processing are processed as necessary. In this case, if fs = 44.1 KHz, the number of bits of input information is 32 bits of time data and 42 bits of data, which is a total of 74 bits, 11. j Neglected, f 8
= 48KH2, the total number of bits of the input blueprint is 7
6 bits are prepared.

従来のデイジクルオーディオレコーグのタイムコードの
フレームt*@1け以上のように構成されているので、
f、3の情報ヲなんらかの方法で判定しなくてはならず
、また、入力情報のビット数が異なるので、そねそれf
sK合ったビット数を用意しておかなければならないた
め、タイムコードの処理する方法が2つ以上必要となり
、回路の似雑化、コストアップになるなどの欠点があつ
)t。
Since the time code of conventional Daisicle Audio Record is structured as frame t*@1 or more,
The information of f and 3 must be determined by some method, and since the number of bits of input information is different,
Since it is necessary to prepare the number of bits that match sK, two or more methods of processing the time code are required, which has drawbacks such as circuit complexity and increased cost.)

〔発明のa安〕[Affordability of invention]

この発1jは上記のような従来のものの欠点ケ除去する
ためKなされたもので、デイジタルオーディオレコーグ
のfBが異なり、タイムコードの1フレームのビット数
が敏ビット違っても・フレームに必要な入力情報のビッ
ト数を同一にし、残りのビットlグミ−にすることによ
り、1つのデータ処理の方法によりデータを判定できる
ディジクルオーディオレコーダ金提供すること全目的と
している。
This development was developed in order to eliminate the drawbacks of the conventional ones as described above. Even if the fB of the digital audio record is different and the number of bits of one frame of time code is different, the number of bits required for the frame is The overall objective is to provide a digital audio recorder that can determine data by a single data processing method by making the number of bits of input information the same and making the remaining bits lug.

〔発明の妄織例〕[Example of fraudulent invention]

以下、この発明の一失施例に図r(ついて説明する。第
2図(al#よび(b) H5それぞi″L f8=4
4.1KHzおよびt’5−48KH2VC対するタイ
ムコードの1フレーム当りのビット構成を示す。81Y
NO(I+が8ビツト、 ORC(2)が16ビツト、
タイムデータを示す32ビツト(31及びその他データ
全入力することができる42ビツト(41で構成され、
fB−4−8KHzの場合汀が1記ビツト内容に加えて
、2ビットのダミービット(51がつけらねる。このよ
うに−r名は、fsが境石どちらになっていても、EI
YNOの8ビツト全検出して、以下タイムデータの32
ビツトと、データ42ビツトk aac 2通じて入力
し、ORCチェックがOKとなれは、入力されたタイム
データ及びデータ金必要に応じて処理できる。
Hereinafter, an example of a failure of this invention will be explained. FIG. 2 (al# and (b)
The bit structure per frame of the time code for 4.1 KHz and t'5-48KH2VC is shown. 81Y
NO (I+ is 8 bits, ORC(2) is 16 bits,
32 bits (31) indicating time data and 42 bits (consisting of 41) that can input all other data.
In the case of fB-4-8KHz, in addition to the content of bit 1, there are 2 dummy bits (51 is not added. In this way, -r name is EI
All 8 bits of YNO are detected, and the following 32 bits of time data are
If the ORC check is OK, the input time data and data can be processed as necessary.

〔発1イの効果〕 以上のようVこ、この@中によれば、タイムコードの1
フレームのビットの内容を同一にし、残ったビットにダ
ミーとして収り扱うように構成したので、データ処理の
回1俗が安4Ill+にでき、システム全体が1?1′
l素化できるなどの効果がある。
[Effect of 1 i] As mentioned above, according to Vko, this@chu, time code 1
Since the configuration is such that the contents of the frame bits are the same and the remaining bits are treated as dummy, the data processing time can be reduced to 4Ill+, and the entire system can be reduced to 1~1'.
It has the effect of being able to be used as an element.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の1フレームのビット内gf示すビット構
成(図、第2図はこの発り]の−実栴例による1フレー
ムのビット内容を示すビット構成図である。 斤お、図中同−符8はそハぞt1同一または相当部分な
・示す。 代理人 大岩増雄 第1図 第2図
Fig. 1 is a bit structure diagram showing the bit contents of one frame according to an actual example of the conventional bit structure showing gf in the bits of one frame (Fig. 2 is the origin of this). The same symbol 8 indicates the same or equivalent part of t1. Agent Masuo Oiwa Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 2つ以上のサンプリング周波数、でオーディオ1M号と
タイムコードを記録するディジタルオーディオレコーダ
において、タイムコードのフレームフォーマットを、フ
レーム長の最も短いフレームのビット構成に他のフレー
ムも合わせ、他のフレームにおける余分に残ったビット
全ダミーとしたことを特徴とするディジタルオーディオ
レコーダ。
In a digital audio recorder that records audio 1M and time code at two or more sampling frequencies, the frame format of the time code is adjusted to match the bit configuration of the frame with the shortest frame length, and the redundant in other frames is A digital audio recorder characterized in that all remaining bits are dummy.
JP3212384A 1984-02-21 1984-02-21 Digital audio recorder Granted JPS60175260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3212384A JPS60175260A (en) 1984-02-21 1984-02-21 Digital audio recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3212384A JPS60175260A (en) 1984-02-21 1984-02-21 Digital audio recorder

Publications (2)

Publication Number Publication Date
JPS60175260A true JPS60175260A (en) 1985-09-09
JPH0581996B2 JPH0581996B2 (en) 1993-11-17

Family

ID=12350103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3212384A Granted JPS60175260A (en) 1984-02-21 1984-02-21 Digital audio recorder

Country Status (1)

Country Link
JP (1) JPS60175260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0236009A2 (en) * 1986-02-26 1987-09-09 Sony Corporation Coding digital data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0236009A2 (en) * 1986-02-26 1987-09-09 Sony Corporation Coding digital data

Also Published As

Publication number Publication date
JPH0581996B2 (en) 1993-11-17

Similar Documents

Publication Publication Date Title
JPS60253065A (en) Decoding system of digital data
JPS6260174A (en) Data recording method
JPS60175260A (en) Digital audio recorder
CN1004591B (en) Information recording and reproducing method and device
JPH11186992A (en) Abnormal synchronizing signal elimination method
US6583941B1 (en) Method and apparatus for thermal asperity recovery for word sync detection in data channels
JPS62232768A (en) Digital signal processor
JPS6117271A (en) Optical disk device
JP3536617B2 (en) Digital data playback device
JPS6113476A (en) Synchronous control system of cassette type magnetic tape device
JPS6047269A (en) Information recording and reading device
JPS61170962A (en) Recording and reproducing device of digital signal
JPS63311669A (en) Data recorder
JPH0834038B2 (en) Information recording / reproducing device
JPS601675A (en) Error detecting circuit
JPH03282600A (en) Data recovery confirming system
JPS5897170A (en) Electronic editing device
JPS58161115A (en) Digital sound recording and reproducing device
JPS62150563A (en) Synchronizing circuit
JPS613369A (en) Information recording and reproducing device
JPS6320777A (en) Test system for data recording/reproducing device
JPS62250786A (en) Digital sound data processor
JPH01258271A (en) Pcm signal magnetic regenerating device
JPS60117468A (en) Recording and reproducing device of pcm system
JPH0520828B2 (en)