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JPS60160080U - PUT malfunction prevention circuit - Google Patents

PUT malfunction prevention circuit

Info

Publication number
JPS60160080U
JPS60160080U JP4753384U JP4753384U JPS60160080U JP S60160080 U JPS60160080 U JP S60160080U JP 4753384 U JP4753384 U JP 4753384U JP 4753384 U JP4753384 U JP 4753384U JP S60160080 U JPS60160080 U JP S60160080U
Authority
JP
Japan
Prior art keywords
gate
prevention circuit
malfunction prevention
connect
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4753384U
Other languages
Japanese (ja)
Inventor
文則 仲矢
矢島 賢一
小田部 光保
青池 南城
Original Assignee
東芝ライテック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝ライテック株式会社 filed Critical 東芝ライテック株式会社
Priority to JP4753384U priority Critical patent/JPS60160080U/en
Publication of JPS60160080U publication Critical patent/JPS60160080U/en
Pending legal-status Critical Current

Links

Landscapes

  • Protection Of Static Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案の1実施例を示す。 i :PUTc、Di :ダ浮オード。C2:コンデン
サ。RO:抵抗。
The drawing shows an embodiment of the invention. i: PUTc, Di: floating ode. C2: Capacitor. RO: Resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] PUTのゲートバイアス電源の正側にダイオードのアノ
ードを接続し、前記ダイオードを介してゲートにバイア
ス電圧を与え、ゲートとゲートバイアス電源の負側との
間に抵抗を接続し、アノードとゲートとの間にコンデン
サを接続し、このコンデンサと並列に抵抗を接続したP
UT誤動作防止回路。
Connect the anode of a diode to the positive side of the gate bias power supply of PUT, apply a bias voltage to the gate through the diode, connect a resistor between the gate and the negative side of the gate bias power supply, and connect the anode and gate. A capacitor is connected between P and a resistor is connected in parallel with this capacitor.
UT malfunction prevention circuit.
JP4753384U 1984-03-31 1984-03-31 PUT malfunction prevention circuit Pending JPS60160080U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4753384U JPS60160080U (en) 1984-03-31 1984-03-31 PUT malfunction prevention circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4753384U JPS60160080U (en) 1984-03-31 1984-03-31 PUT malfunction prevention circuit

Publications (1)

Publication Number Publication Date
JPS60160080U true JPS60160080U (en) 1985-10-24

Family

ID=30562947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4753384U Pending JPS60160080U (en) 1984-03-31 1984-03-31 PUT malfunction prevention circuit

Country Status (1)

Country Link
JP (1) JPS60160080U (en)

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