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JPS60154629A - Pressure contact semiconductor device - Google Patents

Pressure contact semiconductor device

Info

Publication number
JPS60154629A
JPS60154629A JP1011284A JP1011284A JPS60154629A JP S60154629 A JPS60154629 A JP S60154629A JP 1011284 A JP1011284 A JP 1011284A JP 1011284 A JP1011284 A JP 1011284A JP S60154629 A JPS60154629 A JP S60154629A
Authority
JP
Japan
Prior art keywords
electrodes
pressure
contact
semiconductor device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1011284A
Other languages
Japanese (ja)
Inventor
Akira Ishida
石田 昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1011284A priority Critical patent/JPS60154629A/en
Publication of JPS60154629A publication Critical patent/JPS60154629A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は圧接型半導体装置に係り、特に、半導体基体に
対し、ろう材を一切用いないで′亀換等を圧接する構造
の半導体装置に関するものである。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a pressure-contact type semiconductor device, and in particular to a semiconductor device having a structure in which a solder plate or the like is pressure-bonded to a semiconductor substrate without using any brazing material. It is.

〔発明の背刑〕[Critus of invention]

圧接型半導体装置は二種に太別嘔れ、その第一は半導体
基体を補助支持板にろう伺しているもの(特公昭47−
4818号公報)、第二は補助支持体を用いず、温度補
償板と半導体基体を圧接して□いるものである(特公昭
46−31926 月公報)。
There are two types of press-contact type semiconductor devices, the first of which is a device in which the semiconductor substrate is soldered to an auxiliary support plate (Special Publication Publication No. 47-1972).
4818), and the second is one in which the temperature compensating plate and the semiconductor substrate are brought into pressure contact without using an auxiliary support (Japanese Patent Publication No. 31926/1972).

補助支持体としては熱膨張係数に近似したモリブデンあ
るいはタングステンが用いられ、温tW補償版としては
半導体基体上の電極膜と溶着を起し離い金柄、例えは電
極膜がアルミニウムの」):i、台タングステンが用い
られ“る。
The auxiliary support is made of molybdenum or tungsten, which has a coefficient of thermal expansion similar to that of the material, and the temperature tW compensating plate is made of molybdenum or tungsten, which adheres to and separates from the electrode film on the semiconductor substrate. i.Tungsten base is used.

前方では、ろう何役に熱膨張係数の差から、彎曲を生じ
、彎曲度は半導体基体の口佳にbLかい太となるので、
大型のものには不向きである。
At the front, curvature occurs due to the difference in thermal expansion coefficient between the wax and the curvature, and the degree of curvature becomes bL thicker at the opening of the semiconductor substrate.
Not suitable for large objects.

後者では、半導体基体がtiij助支持体とろう付芒れ
ていないので騙す曲を生ずることはないが、各部材の動
きを規制する手段が必要である。
In the latter case, since the semiconductor substrate is not soldered to the auxiliary support, no deceptive curves occur, but means for regulating the movement of each member is required.

第1図は従来の後者に層する圧接型ダイオード100を
示している。
FIG. 1 shows a conventional latter layer pressure contact type diode 100.

セラミック円筒101はその両端開孔部にコノく−ル可
撓性フランジ102,103を介して銅外部奄幀104
,105が設けられ気密容器を形成している。上下外部
電極104,105間にI)n接合が形成されているシ
リコン基体106が配置される。シリコン基体106の
上下主表面には第2図に示すようにアルミニウム電極膜
107゜108が蒸着後、シンタリング処理を施して設
けられ、また、上止表面の外周部にアルミニウムろう1
09によりpn接合を持たないシリコン環110が固着
嘔れている。シリコン基体106の傾斜面に加工された
側周にはpn接合が蕗出し、弐面女走化剤としてシリコ
ンゴム111が塗布されている。電極膜107,108
に温度補償板112.113が接触される。その接触面
にアルミニウム層114.115が蒸着により設けられ
ている。−ト外部電極104の容器内上部には四部10
4aが設けられており、鋼板116が固着されている。
Ceramic cylinder 101 has a copper outer shell 104 through flexible flanges 102 and 103 at both ends thereof.
, 105 are provided to form an airtight container. A silicon substrate 106 in which an I)n junction is formed between the upper and lower external electrodes 104 and 105 is arranged. As shown in FIG. 2, aluminum electrode films 107 and 108 are provided on the upper and lower main surfaces of the silicon substrate 106 by sintering after being vapor-deposited, and an aluminum solder film 1 is provided on the outer periphery of the top surface.
09, the silicon ring 110 having no pn junction is stuck and broken. A pn junction is formed on the side periphery of the silicon substrate 106 processed into an inclined surface, and silicone rubber 111 is applied as a female chemotactic agent to the second side. Electrode films 107, 108
Temperature compensating plates 112 and 113 are contacted. An aluminum layer 114, 115 is provided on the contact surface by vapor deposition. - The upper part of the outer electrode 104 inside the container has four parts 10.
4a, and a steel plate 116 is fixed thereto.

上外部電極105の容器内下部にはやはり銀板117が
固着されている。両銀板116゜117間に第2図に示
したシリコン基体106を温度補償板112,11.3
を介して挟持される。
A silver plate 117 is also fixed to the lower part of the upper external electrode 105 inside the container. The silicon substrate 106 shown in FIG.
It is held between the two.

容器内にはテフロンガイド@118が設けられている。A Teflon guide @118 is provided inside the container.

これは下外部′電極104のフランジ部104bと下方
で係合し、上方でシリコン環110と係合している。
This engages the flange portion 104b of the lower outer electrode 104 at the bottom and the silicon ring 110 at the top.

以上ノ々口<、シリコン基体t 06 、r7it1m
補償板112.113は自由に動きイ4fるので、シリ
コン環110を設けたり、凹部104 a、フランジ部
104bを設け、テフロンガイド筒118を設置する必
豊かあり、複雑な構造となっている。
Above Nonoguchi <, silicon substrate t 06 , r7it1m
Since the compensating plates 112 and 113 move freely, it is necessary to provide a silicon ring 110, a recess 104a, a flange 104b, and a Teflon guide tube 118, resulting in a complicated structure.

上り嶌袂なことは、シリコン基板106等を気密容器内
に封止し、上下外部電極104,105間で加圧し、実
使用状態にしてからでないと、tVA性試験が不可能な
ことである。
The most important thing is that the tVA property test cannot be performed unless the silicon substrate 106 etc. is sealed in an airtight container, pressurized between the upper and lower external electrodes 104 and 105, and put into actual use condition. .

〔発明の目的〕[Purpose of the invention]

本発明の目的は構造が単純で位置合せが容易であり、組
立途中段階で特性試験を行うことが可能な圧接型半導体
装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a press-contact type semiconductor device that has a simple structure, is easy to align, and can be subjected to characteristic tests during assembly.

〔発明の概要〕[Summary of the invention]

上記目的を達成する本発明の%徴とするところは1刻の
内部″電極間に電極膜が両主表面に設けられた半導体基
体を熱膨張係数が半導体基体に近似した温度補償板を介
して挾持し、各内部電極の外周に設けた加圧環を介して
内向部電極間に加圧力を付与してなる整流単位体を、絶
縁筒の開孔両端部に各々可撓的に外部電極を設けてなる
気密容器内に内外両電極が当接するように封止され、加
圧環は内部電極に当’4″)、:する外部電極を包囲係
合していることにある。
The feature of the present invention which achieves the above object is that a semiconductor substrate having an electrode film provided on both main surfaces between the internal electrodes is connected via a temperature compensating plate having a coefficient of thermal expansion close to that of the semiconductor substrate. A rectifying unit is formed by sandwiching the internal electrodes and applying pressure between the inward electrodes via pressure rings provided on the outer periphery of each internal electrode, and external electrodes are flexibly provided at both ends of the opening of the insulating tube. The inner and outer electrodes are sealed in an airtight container such that they are in contact with each other, and the pressurizing ring surrounds and engages the outer electrode which is in contact with the inner electrode.

〔発明の実施例〕[Embodiments of the invention]

第3図は本発明の一実施例になる圧接型ダイオード20
0を示している。
FIG. 3 shows a pressure contact type diode 20 which is an embodiment of the present invention.
It shows 0.

第3図において、セラミック円筒201、コバール可撓
性フランジ202,203、上下両銅外部電極204,
205は気密容器を形成し、その内部に本発明になる整
流単位体206が封止されている。整流単位体206゛
十第4園に分解して示すように両主表面にアルミニウム
電極膜207゜208が設けられ、傾斜加工側面に表面
安定化材209が設けられた端部が側面にνに出してい
るpn接合を有するシリコン基体210にタングステン
温度補償板211,212を介して鋼内部電極213,
214が当接婆れる。内部電極213゜214の突出部
213a、214aの外枠よりわずか大きい内径となっ
ている加圧tjGt215,216が嵌合され、テフロ
ンボルト217、ナツト218を用い第5図の如く、1
対の内部′電極213゜214間に温度補償板211,
212を介して半導体基体(シリコン基体)210が挾
持圧接した整流単位体206が組立てられる。
In FIG. 3, a ceramic cylinder 201, Kovar flexible flanges 202, 203, upper and lower copper external electrodes 204,
205 forms an airtight container, and a rectifying unit 206 according to the present invention is sealed inside the container. As shown by disassembling the rectifier unit 206゛10 into the fourth garden, aluminum electrode films 207゜208 are provided on both main surfaces, and the end portion with the surface stabilizing material 209 provided on the inclined side surface is ν on the side surface. Steel internal electrodes 213,
214 will be contacted. Pressure tjGt 215, 216, which has an inner diameter slightly larger than the outer frame of the protrusions 213a, 214a of the internal electrodes 213, 214, are fitted, and as shown in FIG.
A temperature compensating plate 211 between the pair of internal electrodes 213 and 214,
A rectifying unit 206 is assembled in which a semiconductor substrate (silicon substrate) 210 is sandwiched and pressed together via 212 .

テフロンボルト217、ナツト218を加圧環215.
216の外周4〜8ケ所に等間隔をもって設けると加圧
力は全周で均一化される。表iの安定化材209をボル
トに当接するようにしておけば、整流単位体206内で
シリコン基体210が移動することはない。内向部電&
213,214間は絶縁する必要があるが加圧環215
,216の一方を絶縁材とすれば、ポル)217は絶縁
材でなしても良く、その材料の組合せは任意に選択でき
る。第5図に示す整流単位体206は気密容器内に封止
されていないだけで完成品に近い状態にあるので、この
段階でシリコン基体210の特性試験を行うことができ
、又、良品と判断されたものはそのまま清浄分界囲気下
に保管しておいても良い。
Teflon bolt 217 and nut 218 are pressed into pressure ring 215.
If they are provided at 4 to 8 locations on the outer periphery of 216 at equal intervals, the pressing force will be made uniform over the entire periphery. If the stabilizing material 209 shown in Table i is brought into contact with the bolt, the silicon substrate 210 will not move within the rectifying unit 206. Introvert &
It is necessary to insulate between 213 and 214, but the pressure ring 215
, 216 is made of an insulating material, the material 217 may be made of an insulating material, and the combination of materials can be selected arbitrarily. Since the rectifying unit 206 shown in FIG. 5 is not sealed in an airtight container and is in a state close to a finished product, it is possible to perform a characteristic test of the silicon substrate 210 at this stage, and it is determined that it is a good product. You can store it in a clean demarcated atmosphere as it is.

良品は第3図に示すようにセラミック円筒201、フラ
ンジ202,203、外部電極204 、205からな
る気密容器内に封止される。セラミック円筒201の下
側開孔部にフランジ202を介して外部電極204をろ
う付したものを用意し、別途用意した整流単位体206
をセットする。次に外部電極204に設けたフランジ2
03をセラミック円筒201の上側開孔部にろう付して
気ヤ容器が完成すると共にその内に整流単位体206が
封止された形になる。ここで、外部電極204゜205
の凸部204a、205aの外径を内部電極213,2
14の凸部213a、214aとはぽ同じ寸法とし、か
つ、加圧環215.216の内径よりわずかに小さくな
っているので、加工環215.216は外部′電極20
4,205の内部電極213,214との接触部を外周
側から包囲する形となって、整流単位体206が気2と
容器内で接触面に平行な方向に移動することを阻止する
ことができる。
A non-defective product is sealed in an airtight container consisting of a ceramic cylinder 201, flanges 202, 203, and external electrodes 204, 205, as shown in FIG. An external electrode 204 is brazed to the lower opening of a ceramic cylinder 201 via a flange 202, and a separately prepared rectifying unit 206 is prepared.
Set. Next, the flange 2 provided on the external electrode 204
03 is brazed to the upper opening of the ceramic cylinder 201 to complete the air container, and the rectifying unit 206 is sealed therein. Here, the external electrodes 204°205
The outer diameter of the convex portions 204a, 205a of the internal electrodes 213, 2
The protrusions 213a and 214a of No. 14 have the same dimensions and are slightly smaller than the inner diameter of the pressurizing rings 215 and 216, so the processing rings 215 and 216 are connected to the external electrode 20.
The rectifying unit 206 can be prevented from moving in the direction parallel to the contact surface within the container with the air 2 by surrounding the contact portion with the internal electrodes 213 and 214 of the air 2 and the internal electrodes 214 from the outer peripheral side. can.

第6図、第7図は各々他の実施例を示しており、第3図
〜第5図に示したものと同一物、相当物には同一符号を
付けである。
6 and 7 each show other embodiments, and the same or equivalent parts as shown in FIGS. 3 to 5 are given the same reference numerals.

第6図の実施例では内外両電極204,205゜213
.214の接触部に凹部が形成され、中子219が挿入
されている。中子219の設置により、整流単位体20
6が気密容器内で回転することが防止される。
In the embodiment shown in FIG. 6, both the inner and outer electrodes 204, 205° 213
.. A recess is formed in the contact portion of 214, into which a core 219 is inserted. By installing the core 219, the rectifying unit 20
6 is prevented from rotating within the airtight container.

第7図の実施例では、平坦な内部電極213゜214が
使用され、加工環215,216か内部電極213,2
14の外側面に保合ケれて、整流単位体206と外部電
極204.205との保合部材となっている。
In the embodiment of FIG. 7, flat internal electrodes 213, 214 are used, and the working rings 215, 216 or internal electrodes 213, 2
The rectifying unit 206 and the external electrodes 204 and 205 are fitted together on the outer surface of the rectifying unit 206 and serves as a holding member.

第3図、第7図の実施例で、加圧環215゜216と内
外両電極204,205,213゜214との保合部の
形状を非真円形とすれば、第6図に示す中子219を設
けなくても、整流単位体206の回転防止が可能である
In the embodiments shown in FIGS. 3 and 7, if the shape of the retaining portion between the pressure ring 215° 216 and the inner and outer electrodes 204, 205, 213° 214 is non-perfectly circular, the core shown in FIG. Even if 219 is not provided, the rotation of the rectifying unit 206 can be prevented.

各実施例では加圧手段としてボルト217、ナツト21
8を用いているが内部電極213,214間に加圧力を
加えられるなら、これに代るものとして如何なる手段で
もよい。
In each embodiment, a bolt 217 and a nut 21 are used as the pressurizing means.
8 is used, but any means may be used instead as long as it is possible to apply pressure between the internal electrodes 213 and 214.

実使用状態では外部電極204,205間に正規の接触
面圧が加えられるから、ボルト217、ナツト218等
の加圧手段による整流単位体206の加圧は仮圧接、す
なわち、実使用時に加えられる加圧力より低い加圧力で
整流単位体206が構成されていれはよい。
In actual use, a normal contact pressure is applied between the external electrodes 204 and 205, so the pressure applied to the rectifying unit 206 by pressure means such as bolts 217 and nuts 218 is temporary pressure welding, that is, it is applied during actual use. The rectifying unit 206 may be configured with a pressure lower than the pressure applied.

尚、本発明は図示したダイオードだけでなく、トランジ
スタ、ザイリスタ等、各種の圧接型半導体装置に適用が
可能である。
Note that the present invention is applicable not only to the illustrated diode but also to various pressure-contact type semiconductor devices such as transistors and Zyristors.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、単純な構造で゛位
置合せが容易であり、組立途中段階でも特性試験を行う
ことが可能な圧接型半導体装置を得ることかできる。
As described above, according to the present invention, it is possible to obtain a press-contact type semiconductor device that has a simple structure, is easy to align, and allows characteristic tests to be performed even during assembly.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の圧接型ダイオードを示す縦断面図、第2
図は第1図のダイオードの要部分解図、第3図は本発明
の一実施例になる圧接型ダイオードの縦断面図、第4図
は第3図のダイオードの要部分解図、第5図は第4図に
示した各部材を整流単位体として組立てた状態を示す縦
断面図、第6図、第7図は各々本発明の他の実施例にな
る圧接型ダイオードの縦断面図である。 200・・・圧接型ダイオード、201・・・セラミッ
ク円筒、202,203・・・フランジ、204,20
5・・・外部電極、206・・・整流単位体、207,
208・・・金属膜、209・・・表面安定化材、21
0・・・シリコン基体、211,212・・・温度補償
板、213゜214・・・内部電極、215,216・
・・加圧環、2137・・・ボルト、218・・・ナツ
ト、219・・・中子。 へ 代理人 弁理士 尚橋明夫 メ 1 図 躬27 メ 312]
Figure 1 is a vertical cross-sectional view showing a conventional pressure contact diode, Figure 2
The figures are an exploded view of the main parts of the diode shown in Fig. 1, Fig. 3 is a vertical cross-sectional view of a press-contact type diode according to an embodiment of the present invention, Fig. 4 is an exploded view of the main parts of the diode shown in Fig. 3, and Fig. 5 The figure is a longitudinal sectional view showing a state in which the components shown in FIG. 4 are assembled as a rectifying unit, and FIGS. 6 and 7 are longitudinal sectional views of pressure contact diodes according to other embodiments of the present invention. be. 200... Press contact type diode, 201... Ceramic cylinder, 202, 203... Flange, 204, 20
5... External electrode, 206... Rectifier unit, 207,
208... Metal film, 209... Surface stabilizing material, 21
0...Silicon base, 211,212...Temperature compensation plate, 213°214...Internal electrode, 215,216...
... Pressure ring, 2137 ... Bolt, 218 ... Nut, 219 ... Core. Agent Patent Attorney Akio Naohashi, 1, 27, 312]

Claims (1)

【特許請求の範囲】[Claims] 1.1対の内部電極間に電極膜が両生表面に設けられた
半導体基体を熱膨張係数が半導体基体に近似した温度補
償板を介して挾持し、各内部1極の外周に設けた加圧環
を介して内向部電極間に加圧力を付与してなる整流単位
体を絶縁筒の開孔両端部に各々可撓的に外部電極を設け
てカる気密容器内に内外両電極が当接するように封止さ
れ、加圧環は内部電極に当接する外部電極を包囲係合し
ていることを特徴とする圧接型半導体装置。 2、特許請求の範囲第1項において、内外両電極はほぼ
等しい外径の凸部を有し、この凸部の外径よりわずか大
きい内径の加圧環が当接し合う内外両t4iiISの両
凸部を包囲係合していることを特徴とする圧接型半導体
装置。
1. A semiconductor substrate with an electrode film provided on its bidirectional surface between a pair of internal electrodes is sandwiched via a temperature compensating plate whose thermal expansion coefficient approximates that of the semiconductor substrate, and a pressure ring is provided around the outer periphery of each internal pole. A rectifying unit is formed by applying pressure between the inward electrodes through the insulating tube, and external electrodes are flexibly provided at both ends of the opening of the insulating tube, so that the inner and outer electrodes are in contact with each other in an airtight container. 1. A press-contact type semiconductor device, characterized in that the pressure ring surrounds and engages an external electrode that is in contact with an internal electrode. 2. In claim 1, both the inner and outer electrodes have a convex portion with approximately the same outer diameter, and both the inner and outer electrodes have convex portions of both the inner and outer t4iiS in which pressure rings having an inner diameter slightly larger than the outer diameter of the convex portion abut each other. A press-contact type semiconductor device, characterized in that the two are encircled and engaged.
JP1011284A 1984-01-25 1984-01-25 Pressure contact semiconductor device Pending JPS60154629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1011284A JPS60154629A (en) 1984-01-25 1984-01-25 Pressure contact semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1011284A JPS60154629A (en) 1984-01-25 1984-01-25 Pressure contact semiconductor device

Publications (1)

Publication Number Publication Date
JPS60154629A true JPS60154629A (en) 1985-08-14

Family

ID=11741227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1011284A Pending JPS60154629A (en) 1984-01-25 1984-01-25 Pressure contact semiconductor device

Country Status (1)

Country Link
JP (1) JPS60154629A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02110944A (en) * 1988-10-19 1990-04-24 Toshiba Corp Pressure welding type semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02110944A (en) * 1988-10-19 1990-04-24 Toshiba Corp Pressure welding type semiconductor device

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