JPS60149273U - Synchronous signal separation circuit - Google Patents
Synchronous signal separation circuitInfo
- Publication number
- JPS60149273U JPS60149273U JP3664784U JP3664784U JPS60149273U JP S60149273 U JPS60149273 U JP S60149273U JP 3664784 U JP3664784 U JP 3664784U JP 3664784 U JP3664784 U JP 3664784U JP S60149273 U JPS60149273 U JP S60149273U
- Authority
- JP
- Japan
- Prior art keywords
- separation circuit
- signal separation
- synchronous signal
- video signal
- peak value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Synchronizing For Television (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例の同期分離回路図、第２図は第１図の各
部の信号波形図、第３図は第１図のピーククランプ回路
の詳細回路図、第４図は本実施例の同期分離回路図、第
５図は第４図の各部の信号 □波形図、第６図は第４図
の回路の詳細回路図である。
図において、１は複合映像信号、３はコンパレータ、１
０はピーク検出器、１１はレベルシフト −回路を夫
々示す。Fig. 1 is a synchronous separation circuit diagram of the conventional example, Fig. 2 is a signal waveform diagram of each part of Fig. 1, Fig. 3 is a detailed circuit diagram of the peak clamp circuit of Fig. 1, and Fig. 4 is a diagram of the present embodiment. A synchronization separation circuit diagram, FIG. 5 is a signal waveform diagram of each part in FIG. 4, and FIG. 6 is a detailed circuit diagram of the circuit in FIG. 4. In the figure, 1 is a composite video signal, 3 is a comparator, 1
0 indicates a peak detector, and 11 indicates a level shift circuit.
Claims (1)
器と、このピーク値をレベルシフトするレベルシフト回
路、このレベルシフトにより得られた値と映像信号とを
比較する比較器とからなることを特徴とする映像信号の
同期信号分離回路。It consists of a peak value detector that detects the peak value of the synchronization signal of the video signal, a level shift circuit that level-shifts this peak value, and a comparator that compares the value obtained by this level shift with the video signal. A video signal synchronization signal separation circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3664784U JPS60149273U (en) | 1984-03-13 | 1984-03-13 | Synchronous signal separation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3664784U JPS60149273U (en) | 1984-03-13 | 1984-03-13 | Synchronous signal separation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60149273U true JPS60149273U (en) | 1985-10-03 |
Family
ID=30542024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3664784U Pending JPS60149273U (en) | 1984-03-13 | 1984-03-13 | Synchronous signal separation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60149273U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0898055A (en) * | 1994-09-22 | 1996-04-12 | Internatl Business Mach Corp <Ibm> | Synchronous signal separation circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS501613A (en) * | 1973-05-07 | 1975-01-09 |
-
1984
- 1984-03-13 JP JP3664784U patent/JPS60149273U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS501613A (en) * | 1973-05-07 | 1975-01-09 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0898055A (en) * | 1994-09-22 | 1996-04-12 | Internatl Business Mach Corp <Ibm> | Synchronous signal separation circuit |
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