JPS60134498A - Method of producing electronic part - Google Patents
Method of producing electronic partInfo
- Publication number
- JPS60134498A JPS60134498A JP24294583A JP24294583A JPS60134498A JP S60134498 A JPS60134498 A JP S60134498A JP 24294583 A JP24294583 A JP 24294583A JP 24294583 A JP24294583 A JP 24294583A JP S60134498 A JPS60134498 A JP S60134498A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- coating
- manufacturing
- exterior
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(a) 発明の技術分野
不発明に、例えばセラミック、M機材料等のベース基板
上にチップ部品、ミニフラットIC等を搭載して成る電
子部品の製造方法に関するものである。[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a method of manufacturing an electronic component in which chip components, mini-flat ICs, etc. are mounted on a base substrate made of ceramic, M-material, etc. be.
(b)技術の背景
電子部品は、蒸着法、印刷法エツチング法等、種々の製
造方法により回路形成されたベース基板上に、チップ抵
抗、コンデンサ、IC等の受動。(b) Background of the technology Electronic components include passive components such as chip resistors, capacitors, and ICs on base substrates on which circuits are formed using various manufacturing methods such as vapor deposition, printing, and etching.
能動部品を搭載し7’C後、耐湿性、耐衝撃性全付与す
るためにシリコン、エポキシ等の樹脂で外装コ等により
塗布法、外装膜構造が異なるが、液状シリコン樹脂でア
ンダーコートした後エポキシ樹脂で最終外装コシトする
、いわゆる2M構造とする場合が多い。After 7'C after mounting the active parts, undercoating with liquid silicone resin is applied with resin such as silicone or epoxy to provide full moisture resistance and impact resistance, although the coating method and structure of the outer coating differ depending on the exterior coating etc. In many cases, a so-called 2M structure is used, in which the final exterior is covered with epoxy resin.
(C)従米伐廚と問題点
第1図は、従来の2重外装コート法の工程の概要を示す
図でおる。(C) Deforestation and Problems Figure 1 is a diagram showing an outline of the process of the conventional double exterior coating method.
まず、ベース基土に種々の部品を搭載する。次いで、シ
リコン工材と、シリコンを硬化させる硬化剤と、シリコ
ンのベース基板への接着力を増すキャタリストと、塗装
の際の粘度調整を行なう溶剤でちるキシレンと全混合し
、この塗装材全部品を搭載したベース基板に吹き付ける
ことにより外装コート金行なう0
次に、外装コートされたベース基板全塗装材として混合
したキシレンを蒸発させるため、約70℃の温度雰囲気
中に約2時間保持し、乾燥させる。First, various parts are mounted on the base. Next, the silicone material, a curing agent that hardens the silicone, a catalyst that increases the adhesion of the silicone to the base substrate, and a solvent called xylene that adjusts the viscosity during painting are mixed together, and all of this coating material is mixed. Exterior coating is carried out by spraying onto the base substrate on which the product is mounted.Next, in order to evaporate the xylene mixed as a coating material on the entire exterior coated base substrate, it is kept in an atmosphere at a temperature of approximately 70°C for approximately 2 hours. dry.
次に、外装コートが施されたベース基板を約70℃の温
度雰囲気中に2時間以上保持し、搭載部品間の底部1部
品間に停留している空気及び塗装材として混合したキシ
レンを排出及び蒸発させる。Next, the base board coated with the exterior coating is held in an atmosphere at a temperature of about 70°C for more than 2 hours, and the air remaining between the bottom parts between the mounted parts and the xylene mixed as a coating material are discharged. Evaporate.
次いで、乾燥の終了したベース基板を約150℃の温度
雰囲気中に約1時間以上保持し、シリコン主材等の硬化
のための熱処理全行なう。Next, the dried base substrate is held in an atmosphere at a temperature of about 150° C. for about 1 hour or more, and a heat treatment for curing the silicon main material and the like is performed.
熱処理が終了したベース基板に対し、エポキシ樹脂で最
終外装コートを行なって電子部品の製造を終える。After the heat treatment has been completed, the base board is coated with a final exterior coat of epoxy resin to complete the manufacturing of the electronic component.
従って前述した従来の電子部品の製造方法にあっては、
外装コート後から熱処理迄゛に多大の時間を要すると共
に、乾燥工程あるいは熱処理の工程中において、搭載部
品底部、S品間に停留している空気や揮発溶剤であるシ
テレンが次々と唄出し、ピンホールを形成することがあ
る0また、底面に噴出しない場合でも樹脂膜内に停滞し
、多孔質の硬化膜となってし1つ。従って、所望の耐湿
性。Therefore, in the conventional electronic component manufacturing method described above,
It takes a lot of time to heat treatment after the exterior coating, and during the drying or heat treatment process, the air trapped at the bottom of the mounted parts and between the S parts and the volatile solvent cytelene are released one after another, causing the pins to burn out. In addition, even if it does not eject to the bottom surface, it stagnates within the resin film and becomes a porous cured film. Hence the desired moisture resistance.
耐衝撃性が得られないという欠点を有する0第2図は、
部品が搭載されたベース基板に外装コートを施した状態
を示す図であって、同g (a)は搭載部品底部1部品
間に空気が停留している状態を示す図、同図(b)はピ
ンホールが発生した状態を示す図である。Figure 2 has the disadvantage of not being able to provide impact resistance.
Fig. 3(a) is a diagram showing a state in which an exterior coating has been applied to a base board on which components are mounted; (a) is a diagram showing a state in which air remains between one component at the bottom of the mounted component; FIG. 2 is a diagram showing a state in which a pinhole has occurred.
図において、1はベースに板、2はベース基板1に搭載
される部品、3はリード線、4はベース基板1及び部品
2を被覆しているシリコン樹脂、5はバ6品2の底部や
部品間に停留していゐ空気、6はピンホールを示す。In the figure, 1 is a plate mounted on the base, 2 is a component mounted on the base substrate 1, 3 is a lead wire, 4 is a silicone resin covering the base substrate 1 and the components 2, and 5 is the bottom of the bar 6 product 2. Air remaining between the parts, 6 indicates a pinhole.
葦た、熱硬化処理工程の前後の、■で外装コートされた
ベース基板1の全数点検、ピンホール補修作業を繰返し
実施していたが完全ではなく、点検1.補修モレ等によ
り、ピンホールが最終外装(粉体塗装)後発生する場合
もちり製品歩留りに影響すると云う欠点がめつfc。Although we had repeatedly carried out 100% inspection and pinhole repair work on the exterior coated base substrate 1 before and after the heat curing process, it was not perfect, and inspection 1. fc has the disadvantage that pinholes occur after the final exterior (powder coating) due to repair leakage, etc., which affects the product yield.
(d) 発明の目的
不発明の目的は、前述した従来の欠点に鑑み、熱硬化処
理の工程中においてピンホールや部品間に空気が停留せ
ず、所望の耐湿性、耐衝撃性を得ることができ、以って
製品歩留v全同上することのできる電子部品の製造方法
を実現することにある0
(e) 発明の構成
そして、この目的は複数個の部品を搭載して成る基板上
に樹脂を被覆する工程と、樹脂が被覆された基板を真空
雰囲気中に所定時間保持せしめる工程と、前記基板を被
覆する樹脂を硬化せしめる工程とを含んでなることを特
徴とする電子部品の製造方法により達成される。(d) Purpose of the Invention The purpose of the invention is, in view of the above-mentioned drawbacks of the conventional technology, to obtain desired moisture resistance and impact resistance without trapping pinholes or air between parts during the heat curing process. The object of the present invention is to realize a method for manufacturing electronic components that can increase the product yield and thereby increase the product yield. manufacturing an electronic component, comprising the steps of: coating a substrate with a resin; holding the substrate coated with the resin in a vacuum atmosphere for a predetermined time; and curing the resin coating the substrate. This is accomplished by a method.
(fン 発明の実施例
以下に、不発明に係る電子部品の製造方法の実施例につ
いて詳細に説明する。第3図は不発明に係る電子部品の
製造方法−の笑施例金説明するための図である。第1図
に示す従来の電子部品の製造方法と異なる点は、乾燥工
程を排除し、熱硬化処理工程を真空雰囲気中で行な9こ
とにある。(Examples of the invention) Examples of the method of manufacturing electronic components according to the invention will be described in detail below. Fig. 3 is an example of the method of manufacturing electronic components according to the invention. The difference from the conventional electronic component manufacturing method shown in FIG. 1 is that the drying step is eliminated and the thermosetting step is performed in a vacuum atmosphere9.
すなわち、塗装材を部品全搭載しているベース基板に吹
き付けることにより外装コ−)1−行なった後、真空雰
囲気中で熱硬化処理を施すことにより、塗装材中に含ま
れている揮発溶剤であるシチレンを排出せしめると共に
、ベース基板上に搭載された部品の底部や部品間に停留
する空気を完全に排出した状態で熱硬化処理を行なえる
。In other words, the exterior coating is carried out by spraying the coating material onto the base board on which all the components are mounted, and then heat curing treatment is performed in a vacuum atmosphere to remove the volatile solvent contained in the coating material. The heat curing process can be performed in a state where a certain amount of styrene is discharged and air remaining at the bottom of the parts mounted on the base substrate and between the parts is completely discharged.
本実施例によれば、ボイド(空洞]の全く無い緻密で良
質の硬化膜が得られるばかりでなく、従来プロセスで必
要としていたピンホール点検及びその補修作業、乾燥作
業が不要となる等、センジュールの信頼性向上及び大巾
な作業工数低減が図れると云う効果が得られる。According to this example, not only a dense and high-quality cured film with no voids (cavities) can be obtained, but also the pinhole inspection, repair work, and drying work required in the conventional process are no longer required. This has the effect of improving the reliability of the module and significantly reducing the number of man-hours.
尚、本実施例では、熱硬化処理を真空雰囲気中で行なう
場合について説明し友が、例えば外装コードンたベース
基板と真空雰囲気中に所定時間保持せしめ、塗装材の揮
1発成分9部品間に停留する空気を排出した上で熱硬化
処理全行なりてもよい。In this example, we will explain the case where the thermosetting treatment is carried out in a vacuum atmosphere. The entire heat curing process may be performed after removing the remaining air.
(乃 発明の詳細
な説明したように、本発明によれば、所望の耐湿性、耐
衝撃性を侍ゐことができ、以て電子部品の製品歩留りを
向上することができる。(No) As described in detail, according to the present invention, desired moisture resistance and impact resistance can be achieved, thereby improving the product yield of electronic components.
第1図は従来の電子部品の製造方法の説明図、第2図は
部品が搭載されたベース基板上に外装コートを施しm状
態を示す図、第3図は不発明に係る電子部品の製造方法
の実施例を説明する図であるU
図において、1はベース基板、2は部品、3はリード線
、4はシリコン樹脂、5は突気、6はピンホールである
。
、え人 弁理士 松 岡 iゆ■Figure 1 is an explanatory diagram of a conventional method for manufacturing electronic components, Figure 2 is a diagram showing a state in which an exterior coat is applied to a base board on which components are mounted, and Figure 3 is a diagram illustrating the manufacturing method of electronic components according to the invention. In the figure U, which is a diagram illustrating an example of the method, 1 is a base substrate, 2 is a component, 3 is a lead wire, 4 is a silicone resin, 5 is a gas hole, and 6 is a pinhole. , Ehito Patent Attorney Iyu Matsuoka■
Claims (1)
する工程と、樹脂が被覆された基板を真空雰囲気中に所
定時間保持せしめる工程と、前記基板を被覆する樹脂を
硬化せしめる工程とを含んでなることを特徴とする電子
部品の製造方法0(2)前記基板を真空雰囲気中に保持
せしめる工程と、前記樹脂を硬化せしめる工程とを同時
に行なうことを特徴とする特許請求の範囲第(1)項記
載の電子部品の製造方法0(υ A step of coating a resin on a board on which a plurality of parts are mounted, a step of holding the resin-coated board in a vacuum atmosphere for a predetermined time, and a step of curing the resin covering the board. 0(2) A method for manufacturing an electronic component, characterized in that the step of holding the substrate in a vacuum atmosphere and the step of curing the resin are performed simultaneously. Manufacturing method for electronic components described in (1) 0
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24294583A JPS60134498A (en) | 1983-12-22 | 1983-12-22 | Method of producing electronic part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24294583A JPS60134498A (en) | 1983-12-22 | 1983-12-22 | Method of producing electronic part |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60134498A true JPS60134498A (en) | 1985-07-17 |
JPH0516200B2 JPH0516200B2 (en) | 1993-03-03 |
Family
ID=17096557
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24294583A Granted JPS60134498A (en) | 1983-12-22 | 1983-12-22 | Method of producing electronic part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60134498A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1993023266A1 (en) * | 1992-05-12 | 1993-11-25 | Seiko Epson Corporation | Electric car |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54149636A (en) * | 1978-05-16 | 1979-11-24 | Ricoh Co Ltd | Copier |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5122630A (en) * | 1974-08-19 | 1976-02-23 | Irie Kosan Kk | IGATASOJIKINADONIOKERU SOYUKIKO |
JPS54152161A (en) * | 1978-05-19 | 1979-11-30 | Fujitsu Ltd | Method of producing hybrid integrated circuit |
JPS55121229A (en) * | 1979-03-09 | 1980-09-18 | Omron Tateisi Electronics Co | Electronic part mounting substrate |
-
1983
- 1983-12-22 JP JP24294583A patent/JPS60134498A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5122630A (en) * | 1974-08-19 | 1976-02-23 | Irie Kosan Kk | IGATASOJIKINADONIOKERU SOYUKIKO |
JPS54152161A (en) * | 1978-05-19 | 1979-11-30 | Fujitsu Ltd | Method of producing hybrid integrated circuit |
JPS55121229A (en) * | 1979-03-09 | 1980-09-18 | Omron Tateisi Electronics Co | Electronic part mounting substrate |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5900686A (en) * | 1902-09-09 | 1999-05-04 | Seiko Epson Corporation | Electric motor vehicle |
WO1993023266A1 (en) * | 1992-05-12 | 1993-11-25 | Seiko Epson Corporation | Electric car |
Also Published As
Publication number | Publication date |
---|---|
JPH0516200B2 (en) | 1993-03-03 |
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