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JPS60110129A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60110129A
JPS60110129A JP58217593A JP21759383A JPS60110129A JP S60110129 A JPS60110129 A JP S60110129A JP 58217593 A JP58217593 A JP 58217593A JP 21759383 A JP21759383 A JP 21759383A JP S60110129 A JPS60110129 A JP S60110129A
Authority
JP
Japan
Prior art keywords
semiconductor chip
gold
wire
wiring pattern
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58217593A
Other languages
English (en)
Inventor
Hisashi Oguro
小黒 寿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP58217593A priority Critical patent/JPS60110129A/ja
Publication of JPS60110129A publication Critical patent/JPS60110129A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009Pre-treatment of the connector or the bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に係り、特に基板上に
形成されたリードと半導体チップ表向上の所定の配線層
とを正しく接続するだめのワイヤづ?ンディング方法に
関する。
〔従来技術〕
通常、半導体装置の製造工程において、半導体チップを
基板上に固着し、電気的な接続を行なう実装工程では、
基板上の所定位置に半導体チップを載置し、接着した後
に、販半導体チップ表面に形成されたポンディングパッ
ドと、該基板上に形成されたポンプイングツfツドとを
、ネイルヘッドワイヤデンディング方式によシ、金屑細
線を介して接続するという方法がとられている。
しかしながら、半導体装置の集積化が進むにつれて半導
体チップ自身の高密度化に加えて、基板の高密度化が高
まシ、金族細線同志の間隔および半導体チップ上のポン
ディングパッドと、基板上のボンディング・モッドとの
距離が短縮されると共に、線径の小さい金属細線は硬度
が充分でないことから、半導体チップの上縁と金属細線
とが短絡してしまうという不都合があった。
〔発明の目的〕
本発明は、前記実情に鑑みてなされたもので、半導体チ
ップと基板と全ワイヤビンディングによって電気的に接
続するにあたシ、半導体チップと金属細線との間の短絡
を防止し、信頼性の篩い半導体装置を提供することを目
的とする。
〔発明の構成〕
上記目的を達成するため、木兄’JJ&よ、ワイヤ〆ン
ディング法によって半導体チップと基板上の間の電気的
接続を行なうのに先立ち、半導体チップの上縁近傍を絶
縁化しておくことを特徴とするものである。
すなわち、半導体チップの上縁近傍を絶縁性物質で被覆
する等の方法によって、絶縁化しておくことによシ、金
属細線が半導体チップの上縁部に接触したとしても短絡
することがないようにし、半導体装置の信頼性を向上さ
せようとするもので必る。
〔実施例〕
以下、本発明を、本発明実施例の半導体装置の製造方法
に基づき、図面を参照しつつ詳細に説明する。
まず、絶縁性のセラミック基板1上に、真空蒸着法によ
って、クロム薄膜、次いで金尚膜を層膜した後、金の電
解メッキを行ない、金薄膜上に金メッキ膜を形成する。
続いて、フォトリソエツチング法によシ、第1図に示す
如く、所定形状の配線/ぐターン2を形成する。
この後、該配線パターン2のチップ載置部(グイパッド
)22に半導体チップ3を、エポキシ樹脂からなる導電
性接着剤を用いて、第2図に示す如く、固着する(ダイ
ボンディング工程)。
更に、第3図に示す如く、該半導体ナツツ3の上縁部近
傍4、ずなわち上面四方の角に絶縁性のペースト5を塗
布し乾燥する。
そして最後に、第4図に示す如く、ネイルヘッドワイヤ
ボンダーを使用し、半纏体チップ3表面に形成されたポ
ンディングパッド31と前記セラミック基板1上の配線
/ぐターフ2内の所定位置に形成されたポンディングパ
ッド21との間を金細線6で接続する。(ワイヤボンデ
ィング)このようにして形成された半導体装置では、金
細線6が半導体ナツツの上縁に接触したとしても、短絡
を起こすことがないため、装置としての信頼性が高い。
また、これによシ、基板上のチップ載置部22と、がン
ディングパッド21との距離tお↓ひ金細線の長さを第
5図に示す如く、更に短縮することが可能となシ、基板
の面密度化が可能となる。
さらには、半導体チップの高集積化(高′g度化)に伴
い、ワイヤボンディングによって接続すべき金細線の数
が増えたとしても、金細勝が張着状態に近い状態となる
まで短縮できるため短絡事故は発生しにくい。
従って、装置としての信頼性を低下させることなく、小
型の半導体装tを得ることが容易に可能とある。
なお、本発明実施例の方法においては、ダイボンf4ン
グ後、すなわち、基板上に半導体チップを固着した後に
、半導体ナツツの上縁部を絶縁化するという方法を用い
たが、基板への固着前、すなわち、半導体チップの状態
で、少なくとも上縁部近傍を絶縁化しても良いことは言
うまでもない。
〔発明の効果〕
以上、説明してきたように、本発明の方法によれば、基
板上の配線パターンと半導体チップとの間をワイヤがン
ディングによって電気的に接続するに先立ち、半導体チ
ップの上級部を絶縁化しているため、半導体チップと金
属細線とV間の短絡を防止し、配線パターンの面密度化
あるいは半導体チップの高集積化に際しても信頼性の高
い半導体装置を提供することが口」能となる。
【図面の簡単な説明】
第1図乃至第4図は不発nA実施例のワイヤボンディン
グ工程を示す図、第5図は本発明の他の実施例を示す図
である。 1・・・セラミック基板、2・・・配線パターン、2・
・・半導体チップ、4・・・上級部近傍、5・・・絶縁
ペースト、6・・・金細線、21.31・・・ポンディ
ングパッド、22・・・チップ載置部。 第1回 第2図 !。 ゝ1 第3図 第4図 第5図

Claims (1)

    【特許請求の範囲】
  1. 基板上に半導体チップを固着した後、ワイヤデンディン
    グによって電気的接続を行なうにあたシ、ワイヤボンデ
    ィングに先立ち、前記半導体チップの上級部を絶縁化す
    る工程を含むことt%徴とする半導体装置の製造方法。
JP58217593A 1983-11-18 1983-11-18 半導体装置の製造方法 Pending JPS60110129A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58217593A JPS60110129A (ja) 1983-11-18 1983-11-18 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58217593A JPS60110129A (ja) 1983-11-18 1983-11-18 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPS60110129A true JPS60110129A (ja) 1985-06-15

Family

ID=16706722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58217593A Pending JPS60110129A (ja) 1983-11-18 1983-11-18 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60110129A (ja)

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