JPS5941470A - Multi-chamber type thin film fabricating apparatus - Google Patents
Multi-chamber type thin film fabricating apparatusInfo
- Publication number
- JPS5941470A JPS5941470A JP15240482A JP15240482A JPS5941470A JP S5941470 A JPS5941470 A JP S5941470A JP 15240482 A JP15240482 A JP 15240482A JP 15240482 A JP15240482 A JP 15240482A JP S5941470 A JPS5941470 A JP S5941470A
- Authority
- JP
- Japan
- Prior art keywords
- chamber
- film forming
- substrate
- air
- chambers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67173—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers in-line arrangement
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/54—Apparatus specially adapted for continuous coating
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physical Vapour Deposition (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はたとえばステンレス基板の表面にアモルファス
(非裔質)シリコン膜(以下「a−8i膜」と称す)な
どを堆積させて太陽電池等を製造する場合のプラズマC
VDを始めとし、蒸着、イオンブレーティング陰極スパ
ッタリングなど各種の成膜方法あるいは場合によっては
りソグラフイ前工程としてのレジストの形成およびその
エツチング等9例外的には大気圧程度の圧力で9通常は
程度に差はあってもある種の減圧空間内で成膜またはそ
の膜加工等を行う装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides plasma C
Various film forming methods including VD, evaporation, ion-blating cathode sputtering, or in some cases resist formation and etching as a pre-lithography process9 Exceptionally, at a pressure of about atmospheric pressure9 Usually, to a certain degree Although there are differences, this relates to an apparatus that performs film formation or film processing within a certain type of reduced pressure space.
各成膜および薄膜加工プロセスについて以下a−8i膜
作成装置をその代表例として説明すると。Each film formation and thin film processing process will be explained below using the A-8I film forming apparatus as a representative example.
従来のa−8!膜作成装置の一例は第1図、第2図に示
されるとおりである。第1図はいわゆる外部電極方式の
容量結合形装置であって(a)は石英管等の安定な絶縁
材料でできた反応室本体、(1))(C)は夫々ゴムガ
スケット等で反応室(a)と気密を保って取付けられる
底板および天板(di)、(d2)は反応管(a)をた
きこむ形で配置された板状の電極、(e)は通常サセプ
タとよばれる試料台、(f)はa−8i膜をその上面に
形成させるための基板、(g)は基板を250°C〜3
50°C程度に加熱してa−8!膜を形成させるための
基板(g)は基板を250°C〜350°C程度に加熱
してa−8ipを形成させるためのヒータ、(h)はザ
セプタ(e)の支持棒、(i)は反応室(a)を真空ポ
ンプによp刊気するための導管、(j)は反応ガスを反
応室(a)に導くだめのガス導”Z (k) (1)
tn)は夫々p、i、n形半導体を基板上に堆積させる
だめのガス源で、一般にはp用にB2H6/AIHI/
/H2,i用に8111伸2−1用にPHいIH4/H
2などのガスが使用される。(n)は電極(di)(d
2)に高周波電圧を加えるための電源である。Conventional a-8! An example of the film forming apparatus is as shown in FIGS. 1 and 2. Figure 1 shows a so-called external electrode type capacitively coupled device, in which (a) is the reaction chamber body made of a stable insulating material such as a quartz tube, and (1) and (C) are the reaction chambers each made of a rubber gasket. (a) and the bottom plate and top plate (di) that are airtightly attached, (d2) are plate-shaped electrodes arranged to enclose the reaction tube (a), and (e) is a sample usually called a susceptor. (f) is the substrate for forming the a-8i film on its top surface; (g) is the substrate heated at 250°C to 30°C.
Heat to about 50°C and a-8! The substrate for forming a film (g) is a heater for heating the substrate to about 250°C to 350°C to form a-8ip, (h) is a support rod for the septa (e), (i) is a conduit for aerating the reaction chamber (a) with a vacuum pump, and (j) is a gas conduit for guiding the reaction gas to the reaction chamber (a) (k) (1)
tn) are gas sources for depositing p-, i-, and n-type semiconductors on the substrate, respectively; generally B2H6/AIHI/
/H2, IH4/H with PH for 8111 extension 2-1
Gases such as 2 are used. (n) is the electrode (di) (d
This is a power supply for applying high frequency voltage to 2).
21↓2図は、理解に便ならしめるために第1図と同様
の記号を用い、これにダラシ−を付して図示しだが、第
1図の形式と異るのは電極(d1′Xd2’)が反応室
(a)内部に配置されており9棟、5た決して本質的で
はないが一方の電極(d2’)内にガスの導入バイブ(
jfが通っている。さらに第1図では基板(f)はガス
導入口に対し下方に位置し、第2図ではその相互位置が
逆になっているがこれもその実験操作の規模やその他の
都合に左右される事項でありて本質的な差異ではない。21↓For ease of understanding, the same symbols as in Fig. 1 are used in Fig. 2, and the symbols are added with a dash. However, the difference from the format in Fig. 1 is that the electrodes (d1'') are arranged inside the reaction chamber (a), and there are 9 buildings;
jf is passing through. Furthermore, in Figure 1, the substrate (f) is located below the gas inlet, and in Figure 2, their relative positions are reversed, but this also depends on the scale of the experimental operation and other circumstances. However, it is not an essential difference.
さて、第′181に例をとると、ステンレス基板(f)
上にヘデ四接金形a−8i膜を生成させるには先づガス
源OQからB2”6A(H4/H2を流してプラズマ中
で分解励起したのちp層を基板(f)上に堆積しついづ
ガス源(1)からSi 114/82ガヌを流して重層
を前記p層の上に堆積させ+ 、1;¥後にガス10n
)からPH3AIH4AI2を流して1層を作成しペテ
ロ接金形a−8i太陽電池たらしめるのが一般に知られ
て因るグロー放電法の概要である。たソしこのときp、
i、n各層の厚さは夫々100 、5000.50OA
と不同であり、成膜速度f: 2%cとするとその成膜
時間は50,2500.250secと不同である。学
術的にはi層を作成するのに5i2)−]6ガスを使用
することが研究され、これを用いれは成膜速度は10〜
20倍促進されると云われているがSi2H6は現時点
では容易に入手できず。Now, taking the '181st example, stainless steel substrate (f)
To generate a Hede four-joint type A-8I film on the top, first, B2"6A (H4/H2) is flowed from the gas source OQ to decompose and excite it in the plasma, and then the p layer is deposited on the substrate (f). After that, a layer of Si 114/82 was deposited on the p layer by flowing Si 114/82 gas from the gas source (1).
) to form a layer of PH3AIH4AI2 to form a Peter welded type A-8I solar cell. This is a generally known glow discharge method. At this time p,
The thickness of each layer i and n is 100 and 5000.50OA, respectively.
If the film-forming rate f: 2%c, the film-forming time is 50,2500.250 seconds, which is different. Academically, research has been conducted on the use of 5i2)-]6 gas to create the i-layer, and when this is used, the film formation rate is 10 ~
Although it is said that Si2H6 can be accelerated by 20 times, Si2H6 is not easily available at present.
かつ高価であって、今のところは経済性に乏しく従って
pl’l”各層の成膜時間の不同は容認せざるを得ない
のが実情である。Moreover, it is expensive, and currently it is not economical, so the reality is that we have no choice but to accept that the film formation times for each layer are different.
またガスを用いたグロー放電によるa−Si膜の作成の
他に、Slターゲットを用いたスパッタリング法や種々
の加熱方法による蒸着法も研究されているが、これらは
多量の電力を消費して作られたシリコン拐を使用してい
るから本来の目的である代替エネルギ拐料としてのa−
Si作成法としては、実用的にも経済的にも問題がある
。In addition to creating an a-Si film by glow discharge using gas, sputtering methods using an Sl target and vapor deposition methods using various heating methods are also being researched, but these methods consume a large amount of power. Because it uses recycled silicone, it can be used as an alternative energy absorbent, which is the original purpose.
As a method for producing Si, there are problems both practically and economically.
以上説明したように5il(4/1(2を主体としたa
−Si膜作成に当って成膜時間に不同が生じるのは一つ
の重大な欠点であるが、その他に不純物が混入するとい
う問題がある。すなわち先づp層を作成するためにB2
H6,/!li IH4/II2ガスを反応室(a)
に流しついでこれの供給を止めi層を作成するためにS
iH4/II2を反応室(a)に流す場合、i層ね、
名称の示す通り真正半導体であるべきであってその前に
流し込まれたp形半導体を形成するための不純物の管理
限界外の混入があるべきてないことに容易に考えられる
。最近の学術的研究に従えばi層も真の真正半導体では
なく、若干の不純物のドーピングが効果的という説があ
るがこれも完全にコントロールされた状態でドーピング
されているべきでおって自然にランダムに存在してよい
ものではない。このランダムな不純物の混入は第1図、
第2図のように導管(j)(jfが共通しているときは
この導管内で発生するし、また巧みな工夫によってガス
6g4 (k) (すに)に対し、夫々別の導管、かり
に(fk) (! I)(f−)が独立して設けられた
としても反応室(a)に残留する不純物の履歴までを消
去することは不可能である。As explained above, 5il (4/1(2)
In forming a -Si film, one serious drawback is that the film formation time varies, but another problem is that impurities are mixed in. In other words, in order to create the p layer first, B2
H6,/! li IH4/II2 gas into reaction chamber (a)
S to stop the supply and create the i layer.
When iH4/II2 flows into the reaction chamber (a), the i-layer,
As the name suggests, it should be a genuine semiconductor, and it is easy to think that there should be no mixing of impurities outside the control limits to form the p-type semiconductor poured before it. According to recent academic research, there is a theory that the i-layer is not a true genuine semiconductor, and that doping with a small amount of impurities is effective, but this too should be doped in a completely controlled manner. It cannot exist randomly. This random impurity mixture is shown in Figure 1.
As shown in Figure 2, when the conduits (j) (jf) are common, the gas is generated in this conduit, and by clever contrivance, gas 6g4 (k) (suni) is generated in separate conduits, respectively. (fk) (! I) Even if (f-) is provided independently, it is impossible to erase the history of impurities remaining in the reaction chamber (a).
これらの欠点を解決する薄膜作成装置を提案されている
ものとして第3図に示すような装置がある。この薄膜作
成装置は第2図との比較から明らかなように第2図の反
応室(B5に仕切弁または同等の機能を発揮する格造物
を設け1これを順次連結し、その各々の反応室(at)
(B2) (B3)内でp+Fnの各層を順次形成さ
せるようにした点にある。An apparatus shown in FIG. 3 has been proposed as a thin film forming apparatus that solves these drawbacks. As is clear from a comparison with FIG. 2, this thin film forming apparatus is equipped with a gate valve or a structure that performs an equivalent function in the reaction chamber (B5) shown in FIG. (at)
(B2) Each p+Fn layer is formed in sequence in (B3).
か\る形式のいわゆるインライン形装置は従来より光学
レンズの多層薄膜蒸着や大形カラーブラウン管のアルミ
バックの場合のように、夫々目的の異る薄膜を真空を破
ることなく順次目的に適った個有の反応室で行わせる技
術をa−Si膜作成に転用したものであるが、上記の従
来の蒸着やスパッタリングと比べて各々の成膜工程時間
に大きい差が存在するためにタクトタイムが最も長時間
の工程、こ\ではi層の成膜時間に支配されるという問
題がある。また、蒸着やスパッタリングと異シプラズマ
CVDにおいては、粉末状物質が周辺の容器壁等に固着
するという難点があり、蒸着やスパッタリングと同様に
防看板を設けてこの問題を解決するにはや\困難さが大
きい。This type of so-called in-line equipment has traditionally been used to deposit thin films for different purposes one after another without breaking the vacuum, as in the case of multilayer thin film deposition for optical lenses or aluminum backs for large color cathode ray tubes. This is a technology that is applied to the production of a-Si films in a conventional reaction chamber, but compared to the conventional evaporation and sputtering mentioned above, there is a large difference in the time required for each film formation process, so the takt time is the shortest. This process takes a long time, and there is a problem in that it is dominated by the time required to form the i-layer. In addition, plasma CVD, which is different from vapor deposition and sputtering, has the disadvantage that powdery substances stick to the surrounding walls of the container, and it is somewhat difficult to solve this problem by installing a barrier sign like in vapor deposition and sputtering. It's big.
たソタクトタイムの不同を解決する方法としてはiR成
膜室を直列に経済性の限界内の個数を設置したりあるい
は1層成膜室を長手方向に長くシ。As a method to solve the disparity in the tact time, it is possible to install iR film-forming chambers in series within the limit of economic efficiency, or to make the single-layer film-forming chamber longer in the longitudinal direction.
i Il?llまたは数個の平行平板対向形電極を設け
ることなども試みられている。i Il? Attempts have also been made to provide one or more parallel plate facing electrodes.
しかし、かような手段を用いたとしても前述のように汚
れのひどい成膜室がこのラインの中に現出し成膜条件の
一定化を阻害しその清掃のためにラインを完全に停止せ
ざるを得ないという重大な欠点を有している。However, even if such a method is used, as mentioned above, a heavily contaminated film forming chamber will appear in this line, which will prevent the film forming conditions from becoming constant, and the line will have to be completely stopped for cleaning. It has the serious drawback of not being able to obtain
以上はa−st膜としてのp+”+”形半導体を製造す
るための従来法の問題点を詳述したが、これその上にA
I等で最電極配線を行わねばならない。Above we have detailed the problems of the conventional method for manufacturing p+"+" type semiconductors as a-st films.
The final electrode wiring must be done with I etc.
しかるに元来、a−8i膜は非常に鋭敏な材F)であっ
て、たとえば第3図の工程終了后これを大気中にとり出
せばそれがクリーンルーム内の作条であるにせよ、 I
TOやλl蒸着室へ搬入するまでに大気圧雰囲気中の水
蒸気等の影響をうけることはさけられず、できればこれ
らのITOやAIの成膜を一貫して大気にはふれずにコ
ントロールされた雰囲気中で移動されることが望ましい
。しかし、第3図に対して他の工程のための成膜室を直
列に連結すればタクトタイムの不同の発生を助長する(
i層の成膜時間よ、!lllは短かいが)ことになり生
産性が低下するという欠点を有する。However, the a-8i film is originally a very sensitive material (F), and if it is taken out into the atmosphere after the process shown in Figure 3 is completed, it will be exposed to I, even if it is made in a clean room.
It is unavoidable that the ITO and AI films will be influenced by water vapor in the atmospheric pressure atmosphere before they are transported to the TO and λl deposition chambers, so if possible, the ITO and AI films should be formed in a controlled atmosphere without being exposed to the atmosphere. It is desirable to be moved inside. However, if film forming chambers for other processes are connected in series with respect to Fig. 3, it will encourage the occurrence of uneven takt times (
Time to form the i-layer! (Although 1ll is short), it has the disadvantage of reducing productivity.
この発明は上記各種の問題点を解決し、変換効率9歩留
りの向上を計ることのできる薄膜作成装置を提供するも
のであり、以下図示実施例に従ってその内容を詳述する
。The present invention provides a thin film forming apparatus capable of solving the above-mentioned various problems and improving conversion efficiency and yield.
上記の例と同様に第4図の実施例はへテロ接合形a−8
i太陽電池製造装置が示されている。(1)はステンレ
ス基板の表面エツチング室で、内部にエツチング用電極
を備え、エツチングガス導入口。Similar to the above example, the embodiment of FIG. 4 is a heterozygous a-8
i A solar cell manufacturing apparatus is shown. (1) is a surface etching chamber for stainless steel substrates, with an etching electrode inside and an etching gas inlet.
排気口およびこの室個有の排気系等を有するがこれらの
付帯設備は本発明とは直接関係しないので図示を省略す
る。以下においても本発明と直接関係しないもの、ある
いはこれまでの図解によって容易に理解できる付帯−設
備については図示を省略する。(2)はn層の成膜室で
、この構造は第1図。Although the room has an exhaust port and an exhaust system unique to this room, illustration of these incidental equipment is omitted since they are not directly related to the present invention. In the following, illustrations of items that are not directly related to the present invention or incidental equipment that can be easily understood from the previous illustrations will be omitted. (2) is the n-layer deposition chamber, and its structure is shown in Figure 1.
第2図に示したような任意のグロー放電または他の形式
による成膜a構育有する。Any glow discharge or other type of deposition a configuration as shown in FIG.
図示例−Fi、i層を3室(3) (4)(5)で夫々
行う構造であるが、この個数は経済的観点などから決定
さるべきであって3室に限定されるものではない。(6
)はp層の成膜室、(7)はITOの成膜室および場合
によっては酸素を導入させることにより化学量論的成膜
を達成するための室が後続あるいは枝分ty して設け
られることもあり得る。(8)は最終アルミ配線のため
の蒸着室である。これら(])〜(8)の各室は先にも
述べたように夫々の排気系を有しており9〃1つその室
の目的に応じたガス導入蒸発機構および排気系を有して
おり、一般的にはい噌フゆる真空容器を形成する。さら
にこれら(1)〜(8)の各室は仕坊弁(91)〜(9
8)を介して気密室0Qと連結される。Illustrated example - This is a structure in which the Fi and I layers are formed in three chambers (3), (4), and (5), respectively, but this number should be determined from an economic standpoint and is not limited to three chambers. . (6
) is a p-layer deposition chamber, (7) is an ITO deposition chamber, and in some cases, a chamber for achieving stoichiometric deposition by introducing oxygen is provided as a subsequent or branched chamber. It is possible. (8) is a deposition chamber for final aluminum wiring. As mentioned earlier, each of these chambers (]) to (8) has its own exhaust system, and each chamber has a gas introduction evaporation mechanism and an exhaust system depending on the purpose of the chamber. It generally forms a flexible vacuum container. Furthermore, each of these chambers (1) to (8) is a shibōben (91) to (9).
8) is connected to the airtight chamber 0Q.
気密室θIは不活性ガス源θ])から導管θつを介して
ガスを供給されるものであって耐真空容器というにどの
厳密性は要求されない。たyし外部の空気が水蒸気な伴
って侵入することがないよう常に大気圧に比べや\高い
圧力に維持され、万一もれが発生しても内部の不活性ガ
スが外にもれ出る性格のものである。尚、ガス源Qυは
導管0→の一部分として(1)〜(8)の各室に連絡さ
れている。気密室(10は)くルプ03を介して中間室
θaと接続され、この中間室a4はさらにパルプahを
介して外界(大気圧)に連通されるようになっている。The gas-tight chamber θI is supplied with gas from an inert gas source θ] through two conduits θ, and is not required to be strictly vacuum-resistant. However, to prevent outside air from entering with water vapor, the pressure is always maintained at a level higher than atmospheric pressure, and even if a leak occurs, the inert gas inside will leak outside. It's a matter of character. Note that the gas source Qυ is connected to each of the chambers (1) to (8) as a part of the conduit 0→. The airtight chamber (10) is connected to the intermediate chamber θa via the pulp 03, and the intermediate chamber a4 is further communicated with the outside world (atmospheric pressure) via the pulp ah.
気密室(IQおよび中間室(ロ)は必要に応じ適当な構
造の搬送機構を備えており、監視窓を有することもある
。、また気密室0Qの大部分はアクリライトのような透
明板で製作することも可能である力;この場合、窓は不
要としても内部に対して手動で搬送その他の操作ができ
るようグローブを設けることもあるが、こ\に述べたこ
れらの付帯設備についても図示を省略する。The airtight chamber (IQ and intermediate chamber (B) are equipped with a transport mechanism of an appropriate structure as necessary, and may also have a monitoring window. Most of the airtight room 0Q is made of transparent plates such as acrylic. In this case, even if a window is not required, a glove may be provided to allow manual transportation or other operations inside the interior, but these additional facilities mentioned above are also shown in the diagram. omitted.
また、ガス系0埠は各負荷との間に十分な気密を要する
バルブを殆んど備えているし、これらバルブを操作する
のに必要な任意の種類のコントローラ(たとえばシーケ
ンサ、マイコン等)も設けられるが木兄13すの本質と
は関係がないので図示を省略する。In addition, the gas system 0-valve is equipped with most valves that require sufficient airtightness between each load, and any type of controller (e.g. sequencer, microcomputer, etc.) required to operate these valves is also included. Although it is provided, its illustration is omitted because it has nothing to do with the essence of the tree.
さて、つぎにすべての室(υ〜(8)はおいており。Now, next, all the rooms (υ~(8) are set aside.
原則的にあるワーク(基板)が本装置内で如何に処理さ
れるかを逐次説明する。In principle, how a certain workpiece (substrate) is processed within this apparatus will be explained step by step.
中間室((褐が大気圧の状態でバルブ(19を開きワー
クが(14)に搬入されるとバルブ09をとじ室θ4)
に個有の排気系0Oで室0滲内を排気し、十分な排気が
完了したのち冷04)と排気系000間を閉じる。次い
で導管θつを通じて不活性ガスで室0荀内を充たす。そ
の−ヒでパル10巻を開くが、気密室OQも同様不活性
ガスで充たされているので、同じ算囲気のま\でワーク
は室OI内に送られバルブθ1を、閉じる。次にチャン
バ(1)もまた不活性ガスで充満しているとすればワー
クはチャンバ(1)の前まで搬送されバルブ(9すが開
いて、ワークをチャンバ(1)内に装入しバルブ(91
)を閉じる。こ\では(1)はこれに個有の排気系で排
気され、適当な表面エツチング用ガスを適量流入させエ
ツチング用電極に通電して表面エツチングが行われる。Intermediate chamber ((open valve 19 when brown is at atmospheric pressure and close valve 09 when the work is carried into (14) chamber θ4)
The inside of the room 0 is evacuated by the exhaust system 0O, which is unique to the system, and after sufficient exhaustion is completed, the connection between the cold 04) and the exhaust system 000 is closed. Then, the inside of the chamber 0 is filled with inert gas through the conduits θ. The 10th volume of Pal is opened at -H, but since the airtight chamber OQ is also filled with inert gas, the workpiece is sent into the chamber OI with the same air, and the valve θ1 is closed. Next, assuming that the chamber (1) is also filled with inert gas, the workpiece is transported to the front of the chamber (1), the valve (9) is opened, the workpiece is charged into the chamber (1), and the valve is opened. (91
) close. In this case, (1) is evacuated by a unique exhaust system, an appropriate amount of surface etching gas is flowed in, and current is applied to the etching electrode to perform surface etching.
これと併行して中間室θ→には次のワークが装入される
。ワークのエツチングが行われれば先の手順とは逆にチ
ャンバ(1)鉱気密室(JQと同様圧力まで加圧゛され
室QO内に搬出され、つソいてチャンバ(2)の前で停
止、チャンバ(2)内に先の手順と同様にして装入され
る。次のワークは当然エツチングのためチャンバ(1)
内に装入される。At the same time, the next workpiece is loaded into the intermediate chamber θ→. Once the workpiece has been etched, it is moved to chamber (1), which is pressurized to the same pressure as JQ, and then transported to chamber QO, in reverse of the previous procedure, and then stopped in front of chamber (2). The next workpiece is loaded into the chamber (2) in the same manner as in the previous procedure.The next workpiece is of course placed in the chamber (1) for etching.
charged inside.
チャンバ(2)内でp層が堆積されれば先と同様。逆の
手順により室QQ内に搬出されチャンバ(3)内に入り
i層が成膜されるが、この間に別のワークはエツチング
用電極膜を経て1層成膜のため夫々チャンバ(4)およ
び(5)に装入される。室(3)内の1層成膜が完了す
ればこのワークはチャンバ(6)に装入されこ\で0層
が成膜しつyいてチャンバ(7)でITO、チャンバ(
8)でAl′f、蒸着され再び室(II内に搬出される
。こうして完成した太陽電池は搬送機構、)<ルプの開
閉、不活性ガスによる同圧化などの手順を経てパルプ0
時を通って外界に搬出される。If the p-layer is deposited in the chamber (2), the process is the same as before. In the reverse procedure, the workpiece is carried out into the chamber QQ and enters the chamber (3) to form the i-layer. During this time, other workpieces pass through the etching electrode film and enter the chamber (4) and chamber (4) respectively to form a single layer. (5). When the film formation of one layer in the chamber (3) is completed, the workpiece is loaded into the chamber (6), the 0 layer is formed, and the ITO is deposited in the chamber (7).
In 8), Al'f is evaporated and carried out again into the chamber (II).The thus completed solar cell undergoes steps such as opening and closing of the transport mechanism, and isopressurizing with an inert gas.
It passes through time and is transported to the outside world.
い1.もしとくに何等かの理由によりかりにチャンバ(
3)の汚染が著しいときはチャンバ(3)の定常使用を
中止せしめるよう、自動または手動で指示または手段を
講じ、これを除いたま\で生産を続行しつ−チャンバ(
3)内の清掃を行うことが可能である。I1. If for some reason the chamber (
If the contamination of chamber (3) is significant, instructions or measures will be taken automatically or manually to stop regular use of chamber (3), and production will continue with this removed.
3) It is possible to clean the inside.
上記説明においては1層成膜室を3室としたが先の説明
にもあるように、もし算術的に思考するならば■)屑を
基準にすると、i層は50室、n屑は5室、そしでIT
O,AI用用膜膜室相当数の設置を必要とすることにな
る。しかし、実際には経済性も十分に考えてチャンバの
個数を決定すべきであって、この発明は例示のように3
室に限定するものでもなく、また単純な算術計算で求め
る上n己チャンバ数の設置を条件とするものでもない。In the above explanation, the number of 1-layer film forming chambers is 3, but as mentioned in the previous explanation, if you think about it arithmetically, ■) Based on waste, the i-layer has 50 chambers, and the n-layer has 5 chambers. Room, IT
This will require the installation of a number of membrane chambers for O and AI. However, in reality, the number of chambers should be determined with due consideration given to economic efficiency, and this invention has three chambers as shown in the example.
It is not limited to the number of chambers, nor does it require the installation of as many chambers as can be determined by simple arithmetic calculations.
また第4図において(υ〜(8)室はすべて独立のチャ
ンバのように示したが、実際に尚っては第5図のように
各VA接の壁を共用することは当然であってこれによっ
て装置全体はかなジコンノくクトなものになるのは云う
までもない。Also, in Figure 4, chambers (υ~(8)) are all shown as independent chambers, but in reality, it is natural that they share the wall adjacent to each VA as shown in Figure 5. Needless to say, this makes the entire device extremely complex.
上記の説明においてはへテロ接合形a−8i太陽電池の
作成装置として例示したが、近時各種の成膜のみならず
、レジストの形成エツチング、ドーピング等の工程を連
続して行うべき各種デ4/々イスの開発と、これら諸工
程のドライ化は日を追って進行している。またテイバイ
ヌによっては精密マスク合せを行うことも不可欠であり
、これをすべて第3図のようなインライン形で強行する
には経済的に不利である。In the above explanation, the manufacturing apparatus for a heterojunction type A-8I solar cell was exemplified. The development of chairs and the drying of these processes are progressing day by day. Furthermore, depending on the type of mask, it is essential to perform precise mask alignment, and it is economically disadvantageous to perform all of this in-line as shown in FIG.
本発明にあっては例示として完全に共通した気密室を設
けることとしたが、たとえばA、 B、 Cの工程は従
来通りのインラインで行ない、その後の次工程を気密室
内で行い、再びり、 E、’F・・・等の工程をインラ
インで行う変形例も含むものである。In the present invention, a completely common airtight chamber is provided as an example, but for example, steps A, B, and C are performed in-line as before, and the next step is performed in the airtight chamber, and then again. This also includes modifications in which steps such as E, 'F, . . . are performed in-line.
各成膜、処理、加工の各室と、内部をや\大気圧より高
く保たれた気密室とで構成する場合の直列並列の組み合
せの数は極めて多い。従ってこれらの極めて多数の直列
、並列各作業室と該気密室゛および中間室から成る高性
能多層薄膜作成装置をこの発明は当然すべて包含する。The number of series-parallel combinations is extremely large when each film forming, processing, and processing chamber is configured with an airtight chamber whose interior is kept at a pressure higher than atmospheric pressure. Therefore, the present invention naturally includes all of these high-performance multilayer thin film forming apparatuses comprising an extremely large number of serial and parallel working chambers, the airtight chambers, and intermediate chambers.
またこ\で気密室の圧力はや\大気圧より高く保たれる
こととして説Fljシだが、特別な事情によってこの気
密室も耐真空容器として構成されてもよい。In addition, it is assumed that the pressure in the airtight chamber is kept higher than atmospheric pressure, but depending on special circumstances, this airtight chamber may also be constructed as a vacuum-resistant container.
さらに第4図において気密室0Qは1個であυかつ中間
室(14)も室θりの1端に設けることを示しているが
、室01のもう1つの端またはレイアウトによっては室
a0の任意の位置に複数個の取出口を設けまたは室QQ
そのものを第4図で云えは(1)へ(8)の各室のもう
一つの端に増設するようにしてもよい。Furthermore, although FIG. 4 shows that there is only one airtight chamber 0Q and that the intermediate chamber (14) is also provided at one end of the chamber θ, depending on the other end of the chamber 01 or the layout, the airtight chamber 0Q is provided at one end of the chamber θ. Provide multiple outlets at arbitrary positions or chamber QQ
It may be added to the other end of each chamber (1) to (8) in FIG. 4.
以上説明したとおりこの発明が提供する多室形薄膜作成
装置は、ある−個または複数個の成膜室を清掃するにあ
たっても装置を完全に停止することがなく、生産を続行
できることが大きな特徴であるが、成膜室の保守同様夫
々に付帯する排気系の保守9点検9分解、再絹立に当っ
てもインラインシステムのように完全に装置を停止せし
める必要がないことは言うまでもない。As explained above, a major feature of the multi-chamber thin film forming apparatus provided by the present invention is that it is possible to continue production without completely stopping the apparatus even when cleaning one or more film forming chambers. However, it goes without saying that unlike in-line systems, it is not necessary to completely stop the apparatus when performing maintenance, inspection, disassembly, and re-setting of the exhaust system that is attached to each film-forming chamber.
さらにこの発明の装置は21部を正圧に保つ気密室を有
するために現在の大部分の装置が広大なりリーンルーム
内に設置され、魁大な電力冷却水を使用して運転されて
いるのに対し、極めて効率的に必要最小限の装置個有の
クリーンルームを同時に保有するという波及的効果を有
する。Furthermore, since the device of this invention has an airtight chamber that maintains positive pressure in the 21st part, most current devices are installed in vast lean rooms and are operated using massive amounts of electric cooling water. However, it has the ripple effect of simultaneously having the minimum required clean room for the equipment in an extremely efficient manner.
成膜室組立後酸素その他適当なガスを反応室に1−2
:iM量(10〜10 Torr)導入し内部に備えた
電極を利用して内部を放電洗浄するようにすれば、汚染
の除去、ゴミの真空輸送など現行の広大なりリーンルー
ム内での作業より更に徹底した清浄化が可能である。After the deposition chamber is assembled, oxygen or other suitable gas is introduced into the reaction chamber in an amount of 1-2:iM (10-10 Torr), and the inside is discharge-cleaned using the electrodes provided inside, thereby removing contamination. It is possible to perform more thorough cleaning than the current work in vast lean rooms, such as vacuum transportation of garbage.
このようにこの発明による多室形薄膜作成装置は経済的
であるとともに生産性、操作性の良好な装置を提供する
ものである。As described above, the multi-chamber thin film forming apparatus according to the present invention is economical and provides excellent productivity and operability.
第1図から第3図は従来装置の構成を概略的に示す図、
第4図はこの発明による装置の構成を概略的に示す図、
第5図はこの発明の女形例を示す図である。
(1)へ(8)・・・成膜室(チャンバー)(91)〜
(98)・・・仕切弁 α0・・・気密室0υ・・・不
活性ガス源 α椴・・・導管α30G・・・パルプ α
→・・・中間室 0Q・・・排気系特許出願人株式会社
島津製作所
1、。
代理人弁理士 武石端彦・1゜Figures 1 to 3 are diagrams schematically showing the configuration of a conventional device;
FIG. 4 is a diagram schematically showing the configuration of the device according to the present invention;
FIG. 5 is a diagram showing an example of the female form of the present invention. Go to (1) (8)... Film forming chamber (chamber) (91) ~
(98)...Gate valve α0...Airtight chamber 0υ...Inert gas source α椴...Conduit α30G...Pulp α
→...Intermediate chamber 0Q...Exhaust system patent applicant Shimadzu Corporation 1. Representative Patent Attorney Hako Takeishi・1゜
Claims (2)
に当って、前記基板の前処理および各薄膜作成用の成膜
室をその薄膜作成に要するプロセスに準じて複数個並置
または直列連結するとともに各成膜室を夫々対応する仕
切等によって別の気密室と連結して構成し、各成膜工程
が終了した基板を一旦前記気密室へ成膜室から搬出した
後2次工程へ搬送するようにしたことを特徴とする多室
形薄膜作成装置。(1) When depositing a single layer or multiple layers of thin films on a certain substrate, a plurality of film forming chambers for pre-processing the substrate and forming each thin film are arranged in parallel or connected in series according to the process required for forming the thin film. At the same time, each film forming chamber is connected to another airtight chamber by a corresponding partition or the like, and the substrates after each film forming process are transported from the film forming chamber to the airtight chamber and then transported to the secondary process. A multi-chamber thin film forming apparatus characterized by:
れていることを特徴とする特許請求の範囲第1歩記載の
多室形薄膜作成装置。(2) The multi-chamber thin film forming apparatus according to claim 1, wherein the airtight chamber is maintained at a pressure higher than or equal to atmospheric pressure with a specific gas.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15240482A JPS5941470A (en) | 1982-08-31 | 1982-08-31 | Multi-chamber type thin film fabricating apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15240482A JPS5941470A (en) | 1982-08-31 | 1982-08-31 | Multi-chamber type thin film fabricating apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5941470A true JPS5941470A (en) | 1984-03-07 |
JPH0246670B2 JPH0246670B2 (en) | 1990-10-16 |
Family
ID=15539766
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15240482A Granted JPS5941470A (en) | 1982-08-31 | 1982-08-31 | Multi-chamber type thin film fabricating apparatus |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5941470A (en) |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6132511A (en) * | 1984-07-25 | 1986-02-15 | Toshiba Mach Co Ltd | Processing device for vapor growth and the like |
JPS61119400A (en) * | 1984-11-13 | 1986-06-06 | Kobe Steel Ltd | Device for carrying body to be treated in closed work space |
JPS62104036A (en) * | 1985-10-31 | 1987-05-14 | Nippon Tairan Kk | Semiconductor processor |
JPS62116769A (en) * | 1985-11-15 | 1987-05-28 | Hitachi Electronics Eng Co Ltd | CVD thin film forming equipment |
JPS62133069A (en) * | 1985-12-03 | 1987-06-16 | Hitachi Electronics Eng Co Ltd | CVD thin film forming apparatus and CVD thin film forming method |
FR2594102A1 (en) * | 1986-02-12 | 1987-08-14 | Stein Heurtey | AUTOMATED FLEXIBLE FAST THERMOCHEMICAL PROCESSING FACILITY |
JPS62280368A (en) * | 1986-05-30 | 1987-12-05 | Semiconductor Energy Lab Co Ltd | Thin film forming device |
JPS6328863A (en) * | 1986-07-22 | 1988-02-06 | Ulvac Corp | Vacuum treatment device |
JPS6373363U (en) * | 1986-10-31 | 1988-05-16 | ||
US5275709A (en) * | 1991-11-07 | 1994-01-04 | Leybold Aktiengesellschaft | Apparatus for coating substrates, preferably flat, more or less plate-like substrates |
US5591267A (en) * | 1988-01-11 | 1997-01-07 | Ohmi; Tadahiro | Reduced pressure device |
US5683072A (en) * | 1988-11-01 | 1997-11-04 | Tadahiro Ohmi | Thin film forming equipment |
US5780313A (en) * | 1985-02-14 | 1998-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
US5789086A (en) * | 1990-03-05 | 1998-08-04 | Ohmi; Tadahiro | Stainless steel surface having passivation film |
US5906688A (en) * | 1989-01-11 | 1999-05-25 | Ohmi; Tadahiro | Method of forming a passivation film |
JP2006339662A (en) * | 2006-06-14 | 2006-12-14 | Hitachi Kokusai Electric Inc | Troubleshooting system for semiconductor manufacturing equipment |
JP2010541237A (en) * | 2007-09-26 | 2010-12-24 | イーストマン コダック カンパニー | Thin film transistor manufacturing method by atomic layer deposition |
CN102054910A (en) * | 2010-11-19 | 2011-05-11 | 理想能源设备有限公司 | LED chip process integration system and treating method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4942423A (en) * | 1972-05-04 | 1974-04-22 | ||
JPS5578524A (en) * | 1978-12-10 | 1980-06-13 | Shunpei Yamazaki | Manufacture of semiconductor device |
-
1982
- 1982-08-31 JP JP15240482A patent/JPS5941470A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4942423A (en) * | 1972-05-04 | 1974-04-22 | ||
JPS5578524A (en) * | 1978-12-10 | 1980-06-13 | Shunpei Yamazaki | Manufacture of semiconductor device |
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6132511A (en) * | 1984-07-25 | 1986-02-15 | Toshiba Mach Co Ltd | Processing device for vapor growth and the like |
JPS61119400A (en) * | 1984-11-13 | 1986-06-06 | Kobe Steel Ltd | Device for carrying body to be treated in closed work space |
US5780313A (en) * | 1985-02-14 | 1998-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
JPS62104036A (en) * | 1985-10-31 | 1987-05-14 | Nippon Tairan Kk | Semiconductor processor |
JPS62116769A (en) * | 1985-11-15 | 1987-05-28 | Hitachi Electronics Eng Co Ltd | CVD thin film forming equipment |
JPS62133069A (en) * | 1985-12-03 | 1987-06-16 | Hitachi Electronics Eng Co Ltd | CVD thin film forming apparatus and CVD thin film forming method |
FR2594102A1 (en) * | 1986-02-12 | 1987-08-14 | Stein Heurtey | AUTOMATED FLEXIBLE FAST THERMOCHEMICAL PROCESSING FACILITY |
JPS62280368A (en) * | 1986-05-30 | 1987-12-05 | Semiconductor Energy Lab Co Ltd | Thin film forming device |
JPS6328863A (en) * | 1986-07-22 | 1988-02-06 | Ulvac Corp | Vacuum treatment device |
JPS6373363U (en) * | 1986-10-31 | 1988-05-16 | ||
US5591267A (en) * | 1988-01-11 | 1997-01-07 | Ohmi; Tadahiro | Reduced pressure device |
US5683072A (en) * | 1988-11-01 | 1997-11-04 | Tadahiro Ohmi | Thin film forming equipment |
US6074538A (en) * | 1988-11-01 | 2000-06-13 | Tadahiro Ohmi | Thin film forming equipment |
US5906688A (en) * | 1989-01-11 | 1999-05-25 | Ohmi; Tadahiro | Method of forming a passivation film |
US5789086A (en) * | 1990-03-05 | 1998-08-04 | Ohmi; Tadahiro | Stainless steel surface having passivation film |
US5275709A (en) * | 1991-11-07 | 1994-01-04 | Leybold Aktiengesellschaft | Apparatus for coating substrates, preferably flat, more or less plate-like substrates |
JP2006339662A (en) * | 2006-06-14 | 2006-12-14 | Hitachi Kokusai Electric Inc | Troubleshooting system for semiconductor manufacturing equipment |
JP2010541237A (en) * | 2007-09-26 | 2010-12-24 | イーストマン コダック カンパニー | Thin film transistor manufacturing method by atomic layer deposition |
CN102054910A (en) * | 2010-11-19 | 2011-05-11 | 理想能源设备有限公司 | LED chip process integration system and treating method thereof |
WO2012065467A1 (en) * | 2010-11-19 | 2012-05-24 | 理想能源设备(上海)有限公司 | Process integration system for led chip and processing method thereof |
Also Published As
Publication number | Publication date |
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JPH0246670B2 (en) | 1990-10-16 |
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