JPS5940543A - Transferring process of semiconductor pellet - Google Patents
Transferring process of semiconductor pelletInfo
- Publication number
- JPS5940543A JPS5940543A JP57149276A JP14927682A JPS5940543A JP S5940543 A JPS5940543 A JP S5940543A JP 57149276 A JP57149276 A JP 57149276A JP 14927682 A JP14927682 A JP 14927682A JP S5940543 A JPS5940543 A JP S5940543A
- Authority
- JP
- Japan
- Prior art keywords
- jig plate
- sensitive adhesive
- substrate
- pressure
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000008188 pellet Substances 0.000 title claims abstract description 10
- 239000004820 Pressure-sensitive adhesive Substances 0.000 claims abstract description 34
- 239000010410 layer Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 229910001220 stainless steel Inorganic materials 0.000 claims abstract description 3
- 239000010935 stainless steel Substances 0.000 claims abstract description 3
- 239000013078 crystal Substances 0.000 claims description 15
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 abstract description 8
- 230000001070 adhesive effect Effects 0.000 abstract description 8
- 238000007639 printing Methods 0.000 abstract description 5
- 238000001816 cooling Methods 0.000 abstract description 2
- 238000010981 drying operation Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 239000010409 thin film Substances 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
- H01L2224/95136—Aligning the plurality of semiconductor or solid-state bodies involving guiding structures, e.g. shape matching, spacers or supporting members
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体製品の製作において、すでに半導体素子
を形成し完全切断したシリコン等の結晶薄葉から各素子
片を取上げ次工程に移送する際に、精密な孔径および孔
間隔精度の多数個の貫通孔を有する治具板な用い、かつ
感圧接着剤の接着力を利用することによって同時に多数
個の素子片を取上げ次工程に移送することにより作業能
率を高める方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION In the production of semiconductor products, the present invention provides precision hole diameter and hole spacing when picking up each element piece from a thin crystal sheet of silicon or the like that has already formed a semiconductor element and completely cut it, and transporting it to the next process. This relates to a method of increasing work efficiency by simultaneously picking up a large number of element pieces and transferring them to the next process by using a jig plate with a large number of precision through-holes and by utilizing the adhesive force of a pressure-sensitive adhesive. It is.
半導体製品の製作において、すでに半導体素子を形成し
完全切断したシリコン等の結晶薄葉から各素子片を次工
程に移送する際に、従来は真空吸引工具などを用い工薄
葉から素子片を1個づ\取上げ移送する方法あるいはす
べての素子片すなわち半導体ベレットを適宜の方法によ
り完全に分離分散させたのち整列整送装置などを用いて
あらためて整列移送する方法などが用いられているが、
これらの方法では工程数も多く、装置も複雑となリ、移
送能率に限界があった。In the production of semiconductor products, when transferring each element piece to the next process from a crystal thin sheet of silicon or other material that has already been formed into a semiconductor element and completely cut, a vacuum suction tool or the like has traditionally been used to remove the element pieces one by one from the thin crystal sheet. A method of picking up and transporting the semiconductor pellets, or a method of completely separating and dispersing all the element pieces, that is, semiconductor pellets by an appropriate method, and then aligning and transporting them again using an alignment and transport device, etc., are used.
These methods require a large number of steps, require complicated equipment, and have limitations in transfer efficiency.
本発明はこれらの欠点な除き、同時に多数個の素子片な
取上げ移送することにより移送能率を格段に向上させる
ことのできる方法を提供するものであり、以下図面につ
き本発明実施の具体例について説明する。第1図(al
、 (blは本発明の第1の具体例の構成を示すもので
あり、1はすでに半導体素子を形成し完全切断したシリ
コン等の結晶薄葉(半導体ウェハー)、2はそれぞれの
半導体素子片、3は接着剤層4な介して上記薄葉を保持
する支持体、5は位置決めのための貫通孔、6は上記薄
葉の素子片の位置に正確に対応し素子片間隔のn倍の間
隔で精密に設けた貫通孔7を有し、かつ薄葉の位置決め
孔5に対応し正確に位置決めを行うための位置決め貫通
孔8を有する例えばステンレス板などからなる治具板、
9は感圧接着剤、10は治具貫通孔7を通して突出させ
た感圧接着剤層、11は感圧接着剤9に対して剥離性を
示す表面を有する基材を示す。なお、上記治具板の貫通
孔7は結晶薄葉1の素子形成面積とはソ同一の面積にわ
たり治具板上に分布させて設ける。まず治具板6を感圧
接着剤剥離性面を対向面として基材11と密着固定し、
湾曲などの変形の起らないよう適宜の手段で保持したの
ち通常のスクリーン印刷においてメツシュスクリーンを
通して印刷インクを印刷する方法と同様の手法により治
具板6の基材11対向面と反対の側から感圧接着剤9を
治具板の貫通孔7を通して圧入し、基材11な取除けば
治具板上に精密な間隔を保った感圧接着剤ml O&得
る。次に、上記のようにして得た感圧接着剤層を有する
治具板を、必要に応じ℃冷却あるいは乾燥操作を加えた
のち、感圧接着剤層10を対向面として位置決め孔5お
よび8を用いて感圧接着剤層と結晶薄葉上の素子片2と
を正確に対応させ結晶薄葉に圧着することにより感圧接
着剤層10は素子片2に接着する。こ\で感圧接着剤の
凝集力および感圧接着剤層10と素子片2との間の接着
力が素子片2と支持体3との間の接着力よりも充分大き
い感圧接着剤9を選ぶことによって治具板6な薄葉1か
ら引離ずことにより結晶薄葉上の素子総数のは’i 1
7 n 2に相当する素子片を治具板6上に同時に高精
匪に取上げ次の工程に移送することができる。The present invention eliminates these drawbacks and provides a method that can significantly improve transfer efficiency by picking up and transferring a large number of element pieces at the same time.Specific examples of carrying out the present invention will be explained below with reference to the drawings. do. Figure 1 (al
, (bl indicates the configuration of the first specific example of the present invention, 1 is a crystal thin sheet (semiconductor wafer) of silicon or the like that has already been formed into a semiconductor element and is completely cut, 2 is each semiconductor element piece, 3 5 is a support for holding the thin film through the adhesive layer 4; 5 is a through hole for positioning; 6 is a support that precisely corresponds to the position of the element pieces of the thin film, and is precisely spaced at intervals n times the distance between the element pieces; A jig plate made of, for example, a stainless steel plate, which has a through hole 7 provided therein, and a positioning through hole 8 that corresponds to the positioning hole 5 of the thin leaf and allows accurate positioning;
Reference numeral 9 indicates a pressure-sensitive adhesive, 10 indicates a pressure-sensitive adhesive layer projected through the jig through-hole 7, and 11 indicates a base material having a surface exhibiting releasability to the pressure-sensitive adhesive 9. The through-holes 7 of the jig plate are distributed over the same area as the element forming area of the thin crystal leaf 1 on the jig plate. First, the jig plate 6 is tightly fixed to the base material 11 with the pressure-sensitive adhesive releasable side facing the opposite side.
After holding it by appropriate means to prevent deformation such as curvature, the side opposite to the surface facing the base material 11 of the jig plate 6 is applied using a method similar to the method of printing printing ink through a mesh screen in normal screen printing. Pressure-sensitive adhesive 9 is press-fitted through the through-hole 7 of the jig plate, and when the base material 11 is removed, pressure-sensitive adhesive ml O& with precise spacing maintained on the jig plate is obtained. Next, the jig plate having the pressure-sensitive adhesive layer obtained as described above is cooled at °C or dried as necessary, and then the positioning holes 5 and 8 are opened with the pressure-sensitive adhesive layer 10 as the opposing surface. The pressure-sensitive adhesive layer 10 is adhered to the element piece 2 by accurately aligning the pressure-sensitive adhesive layer and the element piece 2 on the crystal thin sheet and pressing the element piece 2 onto the crystal thin sheet. Here, the cohesive force of the pressure sensitive adhesive and the adhesive force between the pressure sensitive adhesive layer 10 and the element piece 2 are sufficiently larger than the adhesive force between the element piece 2 and the support 3. By choosing jig plate 6 and separating it from the thin crystal layer 1, the total number of elements on the crystal thin layer is 'i 1
Element pieces corresponding to 7 n 2 can be simultaneously picked up on the jig plate 6 with high precision and transferred to the next process.
次に第2の具体例について説明する。第2図(al〜(
diにおいて1から11までは第1図と同一の内容を示
し、12は位置合せ孔13を有する例えばステンレス板
などの基板、14は感圧性接着剤、15は基板12上に
間隔を保つ1作成した感圧接着剤層を示す。まず位置合
せ孔8および13を用いて治具板6と基板12との位置
合せを行い密着固定せしめたのち第1の具体例の場合と
同様に通常のスクリーン印刷においてメツシュスクリー
ンを通して印刷インクを印刷すると同様の手法によって
治具板6の基板12に対向する面と反対の側から感圧接
着剤14を貫通孔7を通して圧入することにより基板1
2上に治具板6の貫通孔7に対応する位置に間隔を保っ
た感圧接着剤層15を形成させる。次いで、治具板6を
取除き、上記の感圧接着剤層15を有する基板12を、
必要に応じて冷却あるいは乾燥操作を加えたのち、感圧
接着層側な対向面として位置合せ孔13および5を用い
て、すでに半導体素子を形成し完全切断したシリコン等
の結晶薄葉1と精密に位置合せを行い、重ね合せ、圧着
する。この場合、基板12と感圧接着剤層15との間の
接着強度、感圧接着剤層15の凝集力および感圧接着剤
7815と素子片2との間の接着強度が素子片2と支持
体3との間の接着強度よりも充分大きい感圧接着剤14
を選ぶことによって、圧着後基板13を薄葉1から引離
すことにより基板12上に素子片2を保持した状態でシ
リコン薄葉上の素子総数のはr 1 / n ”に相当
する素子片を同時に取上げ次の工程に移送することがで
きる。Next, a second specific example will be explained. Figure 2 (al~(
1 to 11 indicate the same content as in FIG. The pressure sensitive adhesive layer is shown below. First, the jig plate 6 and the substrate 12 are aligned using the alignment holes 8 and 13 and fixed tightly, and then the printing ink is applied through the mesh screen in normal screen printing as in the case of the first specific example. When printing, the pressure sensitive adhesive 14 is press-fitted through the through hole 7 from the side opposite to the surface facing the substrate 12 of the jig plate 6, using the same method as that of the substrate 1.
A pressure sensitive adhesive layer 15 is formed on the jig plate 2 at a position corresponding to the through hole 7 of the jig plate 6 at a distance. Next, the jig plate 6 is removed, and the substrate 12 having the pressure-sensitive adhesive layer 15 described above is
After cooling or drying as necessary, using the alignment holes 13 and 5 as the facing surface on the pressure-sensitive adhesive layer side, it is precisely aligned with the thin crystal sheet 1 of silicon or the like that has already formed a semiconductor element and is completely cut. Align, overlap, and press. In this case, the adhesive strength between the substrate 12 and the pressure-sensitive adhesive layer 15, the cohesive force of the pressure-sensitive adhesive layer 15, and the adhesive strength between the pressure-sensitive adhesive 7815 and the element piece 2 are determined by the adhesive strength between the element piece 2 and the support. pressure-sensitive adhesive 14 that is sufficiently larger than the adhesive strength between the body 3 and the body 3;
By selecting , by separating the substrate 13 from the thin film 1 after crimping, while holding the device pieces 2 on the substrate 12, the device pieces corresponding to the total number of elements r 1 / n ” on the silicon thin film are picked up at the same time. It can be transferred to the next process.
このようにして第1の具体例においても第2の具体例に
おいても1枚の治具板を用いることにより薄葉上素子総
数のはS 1 / n ”に相当する素子片を同時に取
上げることができるが、次に、例えば位置合せ孔8に対
する貫通孔7の相対位置を素子片1個分の大きさだけず
らせた治具板を用いて第1の具体例および第2の具体例
において述べたと同様の操作を行うことにより初めに取
上げたそれぞれの素子片に隣接する素子片を当初の場合
と同様薄葉上の素子総数のは”; 1 / n ”に相
当する数だけ同時に取上げることができる。同様にして
、それぞれ貫通孔7の位置をずらせたn2枚の治具を用
いるか、あるいはシリコン薄葉1を位置合せテーブルに
より貫通孔7の相対位置にズラすn2回の操作を行うこ
とにより薄葉上の素子片をはソ完全に近く取上げ移送す
ることができる。次に取り上げられた素子片を第2図(
dlの如く基体16(ハイブリッドIO用基板)上に半
田あるいはAgペースト17による同時に多数個接続す
ることもできる。なお、治具板6.基板12はその相互
間および結晶薄葉上の各素子片との関係位置精度を保つ
上で、操作の工程で遭遇する温度範囲で熱膨張係数が小
さく、できれば同一の材料な選ぶことが望ましい。In this way, in both the first concrete example and the second concrete example, by using one jig plate, it is possible to simultaneously pick up element pieces corresponding to the total number of elements on the thin sheet S1/n''. However, next, for example, using a jig plate in which the relative position of the through hole 7 with respect to the alignment hole 8 is shifted by the size of one element piece, the same as described in the first specific example and the second specific example is performed. By performing this operation, it is possible to simultaneously pick up the number of element pieces adjacent to each of the first picked up element pieces, corresponding to the total number of elements on the thin sheet ";1/n", as in the initial case. Then, by using two jigs with the through holes 7 shifted respectively, or by shifting the silicon thin sheet 1 to the relative position of the through holes 7 twice using an alignment table, The element piece can be almost completely picked up and transferred.Then, the picked up element piece is shown in Figure 2 (
It is also possible to connect a large number of them at the same time on the substrate 16 (hybrid IO substrate) using solder or Ag paste 17, such as dl. Note that the jig plate 6. In order to maintain the positional accuracy of the substrates 12 with respect to each other and with respect to each element piece on the crystal thin sheet, it is desirable to select a material that has a small coefficient of thermal expansion in the temperature range encountered during the operation process, and is preferably made of the same material.
以上述べてきたようにし又、本発明の方法によれば従来
の方法による場合のような複雑な装置を用いることなく
、また工程数も少く℃すみ、移送能率を向上させること
ができる。As described above, according to the method of the present invention, it is possible to improve the transfer efficiency without using complicated equipment unlike in the case of the conventional method, and by reducing the number of steps.
図面は本発明にかかる具体的実施例の断面図を示すもの
であり、
第1図(al、 (blは第1の具体例、第2図(a)
〜(dlは第2の具体例を示している。
1・・・すでに半導体素子を形成し、完全切断したシリ
コン等の結晶薄葉、2・・・半導体素子片、3・・・支
持体、4・・・接着剤層、訃・・位置決めのだめの貫通
孔、6・・・治具板、7・・・貫通孔、8・・・位置決
めのための貫通孔、9・・・感圧接着剤、10・・・感
圧接着剤層、11・・・基材、12・・・基板、13・
・・位置決めのための貫通孔、14・・・感圧接着剤、
15・・・感圧接着剤層、16・・・基体、17・・・
半田あるいはAgペースト。The drawings show cross-sectional views of specific embodiments according to the present invention.
~(dl indicates the second specific example. 1...Semiconductor element has already been formed and a completely cut crystal thin sheet of silicon or the like, 2...Semiconductor element piece, 3...Support, 4 ... Adhesive layer, ... Through hole for positioning, 6 ... Jig plate, 7 ... Through hole, 8 ... Through hole for positioning, 9 ... Pressure sensitive adhesive , 10...Pressure sensitive adhesive layer, 11... Base material, 12... Substrate, 13...
...Through hole for positioning, 14...Pressure sensitive adhesive,
15...Pressure sensitive adhesive layer, 16... Base, 17...
Solder or Ag paste.
Claims (1)
よび孔間隔精度の多数個の貫通孔を有する治具板を用い
て、該孔な通して感圧接着剤を圧入し、間隔を保った感
圧接着剤層を基板に形成し、この基板を用いてすでに半
導体ベレットとして完全切断した結晶薄葉から同時に多
数個の半導体ベレットを取上げ移送する方法。 2、間隔を保った感圧接着剤層を有する治具板を、すで
に半導体ベレットとし工完全切断した結晶薄葉に直接圧
着することにより半導体ベレットを取上げることを特徴
とする特許請求範囲第1項記載の方法。 3、厚さ方向に精密な孔径および孔間隔精度の多数個の
貫通孔を有する治具板をステンレスから成る基板に密着
させ、該孔を通して感圧接着剤を圧入することにより該
基板上に間隔を保った感圧接着剤層を形成し、治具板を
取除いたのち、該基板を結晶薄葉に圧着して半導体累子
片を取上げることを特徴とする特許請求範囲第1項記載
の方法。[Claims] 1. In the production of semiconductor products, a jig plate having a large number of through holes with precise hole diameters and hole spacing accuracy in the thickness direction is used, and a pressure sensitive adhesive is applied through the holes. A method in which a pressure-sensitive adhesive layer is formed on a substrate by press-fitting and maintaining intervals, and using this substrate, a large number of semiconductor pellets are simultaneously picked up and transferred from thin crystal sheets that have already been completely cut into semiconductor pellets. 2. A semiconductor pellet is obtained by directly pressing a jig plate having a pressure-sensitive adhesive layer at a distance from each other onto a thin crystal sheet that has already been made into a semiconductor pellet and is completely cut. the method of. 3. A jig plate having a large number of through holes with precise hole diameters and hole spacing accuracy in the thickness direction is brought into close contact with a substrate made of stainless steel, and pressure-sensitive adhesive is press-fitted through the holes to create spaces on the substrate. The method according to claim 1, characterized in that, after forming a pressure-sensitive adhesive layer that maintains the temperature and removing the jig plate, the substrate is pressed against a thin crystal sheet and the semiconductor layer piece is taken up. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57149276A JPS5940543A (en) | 1982-08-30 | 1982-08-30 | Transferring process of semiconductor pellet |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57149276A JPS5940543A (en) | 1982-08-30 | 1982-08-30 | Transferring process of semiconductor pellet |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5940543A true JPS5940543A (en) | 1984-03-06 |
Family
ID=15471670
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57149276A Pending JPS5940543A (en) | 1982-08-30 | 1982-08-30 | Transferring process of semiconductor pellet |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5940543A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0747468A (en) * | 1993-08-09 | 1995-02-21 | Kawasaki Heavy Ind Ltd | Beveling method and device |
WO2002063678A1 (en) * | 2001-02-08 | 2002-08-15 | International Business Machines Corporation | Chip transfer method and apparatus |
WO2004055886A2 (en) * | 2002-12-18 | 2004-07-01 | Koninklijke Philips Electronics N.V. | Manipulation of objects with fluid droplets |
KR100462194B1 (en) * | 2002-10-04 | 2004-12-17 | 미래산업 주식회사 | Multi-Picker of Handler |
US7295375B2 (en) | 2005-08-02 | 2007-11-13 | International Business Machines Corporation | Injection molded microlenses for optical interconnects |
US7399421B2 (en) | 2005-08-02 | 2008-07-15 | International Business Machines Corporation | Injection molded microoptics |
WO2010038025A2 (en) * | 2008-10-01 | 2010-04-08 | Optovate Limited | Illumination apparatus |
CN111128789A (en) * | 2018-10-31 | 2020-05-08 | 昆山工研院新型平板显示技术中心有限公司 | Transfer device and transfer method for micro-component |
-
1982
- 1982-08-30 JP JP57149276A patent/JPS5940543A/en active Pending
Cited By (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0747468A (en) * | 1993-08-09 | 1995-02-21 | Kawasaki Heavy Ind Ltd | Beveling method and device |
WO2002063678A1 (en) * | 2001-02-08 | 2002-08-15 | International Business Machines Corporation | Chip transfer method and apparatus |
JP2004537158A (en) * | 2001-02-08 | 2004-12-09 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Chip transfer method and apparatus |
KR100462194B1 (en) * | 2002-10-04 | 2004-12-17 | 미래산업 주식회사 | Multi-Picker of Handler |
CN100431130C (en) * | 2002-12-18 | 2008-11-05 | 皇家飞利浦电子股份有限公司 | Manipulation object using small liquid |
WO2004055886A2 (en) * | 2002-12-18 | 2004-07-01 | Koninklijke Philips Electronics N.V. | Manipulation of objects with fluid droplets |
WO2004055886A3 (en) * | 2002-12-18 | 2004-12-29 | Koninkl Philips Electronics Nv | Manipulation of objects with fluid droplets |
US9490408B2 (en) | 2005-08-02 | 2016-11-08 | International Business Machines Corporation | Injection molded microoptics |
US7399421B2 (en) | 2005-08-02 | 2008-07-15 | International Business Machines Corporation | Injection molded microoptics |
US7808709B2 (en) | 2005-08-02 | 2010-10-05 | International Business Machines Corporation | Injection molded microlenses for optical interconnects |
US8162656B2 (en) | 2005-08-02 | 2012-04-24 | International Business Machines Corporation | Injection molded microlenses for optical interconnects |
US7295375B2 (en) | 2005-08-02 | 2007-11-13 | International Business Machines Corporation | Injection molded microlenses for optical interconnects |
US10490594B2 (en) | 2005-08-02 | 2019-11-26 | International Business Machines Corporation | Injection molded microoptics |
US10833120B2 (en) | 2005-08-02 | 2020-11-10 | International Business Machines Corporation | Injection molded microoptics |
WO2010038025A2 (en) * | 2008-10-01 | 2010-04-08 | Optovate Limited | Illumination apparatus |
WO2010038025A3 (en) * | 2008-10-01 | 2010-06-24 | Optovate Limited | Illumination apparatus and method of manufacturing the same |
CN102171503A (en) * | 2008-10-01 | 2011-08-31 | 奥普托维特有限公司 | Illumination apparatus and manufacture method thereof |
US8985810B2 (en) | 2008-10-01 | 2015-03-24 | Optovate Limited | Illumination apparatus |
CN111128789A (en) * | 2018-10-31 | 2020-05-08 | 昆山工研院新型平板显示技术中心有限公司 | Transfer device and transfer method for micro-component |
CN111128789B (en) * | 2018-10-31 | 2022-08-05 | 成都辰显光电有限公司 | Transfer device and transfer method for micro-component |
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