JPS5925498B2 - Frame synchronization method for TDMA wireless communication - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention uses TDMA (time division), which is used in a wireless communication system that has multiple lines between multiple wireless stations and separates each line by time division, and captures the line without a comparison station.
The present invention relates to a frame synchronization method and device in a wireless communication method (multiple access).

In the TDMA method, which is one of the multiple access methods for communication lines, the frequency is shared and the time axis is divided into small sections (time slots) from #0 to #n-1 (n is an integer) as shown in Figure 1. These n small sections constitute one frame, and each section is independently accessed and information is sent, thereby forming n communication lines.

In order to use each of these sections as independent communication lines, they must be made so that they do not overlap with each other, and this operation requires one communication station to connect all lines to a reference station.
When the station is controlled, this can be easily done by inputting a frame synchronization signal on the time axis using one synchronization signal generator provided there. As such a time division multiple access (TDMA) method, “I
EEETRANSACTIONSONCOMMUNIC
ATION TECHNOLOGY, VOL.

COM-16N0.4, AUGUST Issue, 19
68'', pages 581 to 588 are known. In this example, one specific station among multiple wireless stations is a reference station.
Then, a control signal indicating the time position is emitted, and other radio stations learn the time position of the line from this control signal and perform procedures to seize the line. In such satellite communication, all ground stations can receive control signals from a common comparison station, so it is possible to input a common frame synchronization signal to all stations. However, in mobile communication devices or small-scale fixed communication devices, etc., there are radio wave propagation obstacles, so it is not necessarily possible for all wireless stations to receive signals from a common comparison station. Furthermore, the second
As shown in the figure, the number of subscribers Cl, , C, 2, C, and 3 of one radio station P1 is limited, and those within the communicable range 51 share the line. When Q is wide, one wireless station P1 cannot necessarily receive all the signals from all wireless stations P2 and P3, and therefore it is impossible for a particular wireless station to become a comparison station, and the TDMA method Communication between stations becomes impossible.

The object of the present invention is to provide a TDMA radio system that can efficiently allocate lines within a communication range without providing a special comparison station when a plurality of small-scale radio stations perform time-division multiple access. An object of the present invention is to provide a communication frame synchronization method and a frame synchronization device.

The operating principle of the present invention will be explained with reference to the radio station layout diagram in FIG. 2 and the diagram showing (wireless communication) line usage conditions in FIG. 3.

In FIG. 2, it is assumed that stations within the ranges surrounded by Sl, S2, and S3 can communicate with each other within their respective ranges. FIG. 3a shows a state in which there are no wireless stations in communication. In this state, when radio station C22 makes a call to start communication between radio stations C22 and P1, radio station C22 generates a frame synchronization signal at its own cycle because it does not detect any signal, and radio station C22 . captures and owns state b
becomes. In this state, when another wireless station C,2 makes a call to communicate with wireless station Cl3, wireless station C,2 uses line B.
It is detected that there is a signal and an empty time slot after that. Radio station Cl2 is on line B. The wireless station Cl2 generates a frame synchronization signal in synchronization with the frame synchronization signal of B.
. The line B, which is in the next time slot, is captured and the line C becomes hidden. When another wireless station P2 makes a call,
Line B2 is captured using the same procedure and becomes state d.

These operations can continue until there are no empty time slots within one frame period. Next, when the communication of wireless station Cl2 ends from state d and the signal on line B disappears, wireless station P2 generates a frame synchronization signal at its own cycle, and this cycle is synchronized with the frame cycle of wireless station C22. Line B because it is not.

moves relative to line B1 (state e).
If the frame period of wireless station P2 is shorter than the frame period of wireless station C22, line B2 is line B. Line B2 and Line B gradually approached. When the interval becomes less than a predetermined value, wireless station P2 connects to line B. Radio station P2 generates a frame synchronization signal in synchronization with the frame synchronization signal of line B. The line B2 is captured at the position following the line B2, and the state is set to f. Conversely, the frame period of wireless station P2 is higher than that of wireless station C22.
If it is longer than that of , conversely, line B2 is line B. As the line BJ approaches the next frame, the wireless station C22 generates a frame synchronization signal in synchronization with the frame synchronization signal of the line B2, and the wireless station C22 captures the line Bd at a position following the line B2 and goes into a hidden state. g. Furthermore, when the wireless station P3 attempts to start communication with the wireless station C3l, the wireless station P3
is the communication line B that is already taking place within Sl and S2.

, B2 cannot be detected. Therefore, the C22 independently seizes its own line in the same procedure as the C22 seizes the line.
In this case, since P3 is in a range where it cannot receive the communication lines BO and B2 carried out within Sl and S2, it will not be interfered with or will not cause any interference. Next, the operation will be described in the case where there is a communication station outside the receiving range of the calling party and within the receiving range of the called party. That is, wireless station P
While 1 is communicating with wireless stations C and 3, wireless station P2 is communicating with wireless station Cl.
Assume that a call is made to 2. Wireless station P2 is wireless station P1
The signal is generated at an arbitrary time because the communication that is already taking place between the terminal and Cl3 cannot be received. When this signal overlaps the communication between wireless station P and Cl3, wireless station Cl2 cannot receive the call and does not respond to wireless station P2. Therefore, line settings are not performed. Further, even when the signal of the wireless station P2 is strong and can be received by suppressing the signal between the wireless stations P and Cl3, the wireless station Cl2 can receive the signal between the wireless stations P1 and Cl3.
Since it can know the existence of a line between it and P2, it responds to wireless station P2 after this line. If the wireless station P2 can receive this response without overlap with other communications, line setup is established, and if it cannot receive the response with overlap with other communications, the line is not set up.
If the calling signal from the wireless station P2 does not overlap with the communication between the wireless stations P1 and C,3, the wireless station Cl2 responds to the wireless station P2 and a line is established. The radio stations P2 and C, 2 each monitor the line and set the line in a position where both do not detect signals from other radio stations, and do not provide any other damage prevention. As explained above, in this method, wireless stations within the range where they can receive each other's signals synchronize and acquire the line, and wireless stations outside the receiving range independently acquire the line. Multiple usage is possible without a central station.

For convenience, the above explanation assumes synchronization with the frame synchronization signal of the other station's line immediately preceding the idle line when a call is made and the own line when communication continues, but the frame synchronization signal of the other station's line or the frame of multiple lines It is also possible to synchronize by referring to a synchronization signal.

In addition, if the line to be monitored is a two-way communication channel, the uplink,
It is possible to use either downlink line. FIG. 4 is a diagram showing a TDMA wireless communication device using the frame synchronization device of the present invention. FSK (Frequency shift) received by the receiving antenna 401
The eying) signal is applied to a receiving device 402, demodulated as a PCM signal to a demodulation output terminal 403, and a frame synchronization pulse train is output to a signal line 404.

The frame synchronizer 405 of the present invention detects an idle line from the frame synchronization pulse train applied via the signal line 404, and generates a frame synchronization pulse for capturing the line. Analog signals such as audio applied to the transmission input terminal 406 are PCM encoded by the PCM encoder 407 and stored in the memory 408 . This accumulated PCM signal is added with a preamble word containing synchronization information and data position information by a burst shaping circuit 409, and sent to a transmitter 410 in synchronization with a frame synchronization pulse generated by a frame synchronization device 405. and is transmitted from the transmitting antenna 411. In the above description, the receiving device 402 is configured as shown in FIG. 8, for example.

That is, the FSK signal from the reception antenna 401 is sent to terminal 8.
01 and is amplified by an amplifier 802. This amplified FSK signal is mixed with the output of a local oscillator 805 by a mixer 804 via a bandpass filter 803, after which the intermediate frequency is extracted by a bandpass filter 806, and then passed through an amplifier 807 and a bandpass filter 809. It is input to demodulator 810. The demodulator 810 is compatible with the modulation method, and for example, in the case of the above-mentioned FSK signal, a frequency discriminator is used. After passing through a low-pass filter 811, this output is applied to a sampling circuit 812, sampled by a clock reproduced by a clock reproduction circuit 813, and outputted as a demodulated signal to terminals 815 and 816. terminal 81
Signals 5 and 816 are connected to terminals 403 and 404, respectively, in FIG. In FIG. 8, a sampling circuit 812 and a clock regeneration circuit 813 are
ETRANS ACTION SON COMMUNICAT
IONS, OL. COM-22, N0.7, JULYi
Fig. SAMPLER and CLOCKP shown in l
Each is known as a ULSEGENERATOR.

Furthermore, the burst shaping circuit 409 in FIG.
It is configured as shown in the figure.

A frame synchronization pulse generated by the frame synchronization device 405 of the present invention is applied to the terminal 916. This synchronization pulse is applied to flip-flop 901 and flip-flop 90.
7 and resets counter 902 and counter 906. The output of clock oscillator 903 is output to switch 905 and counter 912 only when flip-flop 901 is set by AND gate 904 circuit.
supplied to When flip-flop 907 is reset, the reset output causes switch 905 to be pushed toward counter 906, switch 911 to be pushed toward address memory 910, and memory 913 is enabled for writing. The memory 913 is divided into a part storing preamble words (PREAMBLEWORD) and a part storing data (DATA) shown in FIG. . The frame synchronization pulse sets the contents of address memory 910 in counter 912 through OR circuit 908. After this, the counter 912 outputs the memory 91 to the output of the AND gate circuit 904.
3 addresses are counted, and the data applied to the data input terminal 914 from the memory 408 (FIG. 4) is sequentially stored in the memory 913. Counters 906 and 912 simultaneously count the output of the AND gate circuit 904,
Upon counting the number of data to be written to memory 913, counter 906 issues a pulse and flip-flop 907 is reset. The reset flip-flop 907 moves the switch 905 to the counter 906 side, the switch 911 to the address memory 909 side, and
Set memory 913 to readable state. The counter 912 receives the output of the counter 906 via the OR circuit 908 to set the contents of the address memory 909, and receives the output of the AND gate circuit 904 to count the read address of the memory 913. As a result, the contents of the memory 913 are sequentially read from the preamble word portion to the data portion and output to the output terminal 915. When all data (preamble word and data portion) has been read, counter 902 outputs a pulse to reset flip-flop 901, closes gate 904, disconnects the output of clock oscillator 903, and initializes burst shaping circuit 409. Return to state. As a result of the above operations, the burst shaping circuit 4
09 adds a preamble word to the beginning of the data to create one burst signal as shown in FIG. Transmitting device 410 in FIG. 4 is configured as shown in FIG. 10.

The output from the output terminal 915 of the burst shaping circuit 409 in FIG. 4 is applied to the modulation terminal 1001 of the modulator (FSK modulator) 1002 in FIG. 10. The modulator 1002 modulates the output of the oscillator 1003 with the signal applied to the modulation terminal 1001, and the modulated output is applied to the amplifier 1005 via the bandpass filter 1004, where it is amplified and output to the output terminal 1.
It is output to 006. Output terminal 1006 is connected to transmitting antenna 411 in FIG. FIG. 5 is a diagram illustrating in detail the frame synchronizer 405 of the present invention of FIG.

A frame synchronization pulse train on the signal line 404 in FIG. 4 is applied to the input terminal 501. This pulse train is transmitted to the lines BO, Bl, B2, and Bi in use as shown in FIG.
There is a burst signal of length TB, and line B3, which is an empty line, is in a no-signal state. The burst signal is
As shown in FIG. 7, there is a prefix word as described above before the zeta of the audio signal, etc., and the signal detection circuit 502 detects this prefix word and generates the pulse signal shown in FIG. 6b. do. The timer circuit 503 is set (FIG. 6Cf) Rl, R2) by the detection signal (FIG. 6b), and is set to a time period during which a new line can be set up between lines that are already in use (for example, the burst length is set to TB). When more than 2 TB) has passed, the full count (FIG. 6, Cf) Fl, F2) is reached, and a pulse (FIG. 6, Df) S,) is generated on the signal line 504. When the line is initially acquired, the gate of the AND gate circuit 505 remains open (G1) (Ef in FIG. 6) and connects the signal line 506 to the signal line 506.
The pulse S of 4 is output as the pulse Sfl. At this time, the switch 507 is turned to the signal line 506 side,
Pulse S1 on signal line 506 is output to timing circuit 508. After receiving the pulse Sfl, the timing circuit 508 outputs a signal that closes the gate of the AND gate circuit 505 until the time when the same pulse of the next frame is expected to be received. As a result, the gate of the AND gate circuit 505 is opened at the time when it is expected to receive the same signal of the next frame as shown in FIG.
At 06, a pulse f for synchronization is extracted from the signal at the front of the idle line and output. Phase synchronized oscillation circuit 50
9 oscillates in synchronization with the pulse Sfl of the signal line 506,
A frame synchronization pulse is output to the output terminal 510. This output is provided to burst shaping circuit 406 in FIG.
The switch 507 is turned to the signal line 506 side only during initial acquisition, and is turned to the output terminal 510 side at other times, so that the frame synchronization pulse of the output terminal 510 is transferred to the timing circuit 5.
08 to open and close the gate of the AND gate circuit 505. After line acquisition, when the signal on line B2 (FIG. 6a) disappears, pulse S1 (FIG. 6d) disappears, and therefore pulse Sfl (FIG. 6f) disappears. At this time, the phase synchronized oscillation circuit 509 starts oscillating at the free vibration frequency,
A synchronization pulse with a frame period that is not synchronized with other radio stations is generated at the output terminal 510. As a result, the line B3 (FIG. 6a) exclusively occupied by this wireless station is used as another line B. , Bl
When the pulse S3 extracted from the burst signal of the line B becomes the pulse S
appears on signal line 506 as f2, and the phase-locked oscillator 50
9 oscillates in synchronization with the pulse Sf2 from line B, and outputs a frame synchronization pulse, so this radio station is connected to line B.
, and monopolizes line B3 in synchronization with . Line B3 is line Bi
If it approaches , conversely, line Bi synchronizes with line B3 and monopolizes its own line. Through the above-described operations, the present frame synchronization device enables frame synchronization with the signal of the line existing in front of the line exclusively occupied by the own station. The signal detection circuit 502 in FIG. 5 is configured as shown in FIG. 11.

The frame synchronization pulse train applied to the terminal 1101 is
The signals are applied to a shift register 1102 and sequentially shifted from left to right. A predetermined code in the preamble word is stored in the memory circuit 1103, and the contents of each stage are ORed with the contents of each stage of the shift register 1102 by the AND gate circuit 1104, and the contents are logically ORed by the AND gate circuit 1105. applied. AND gate circuit 11
05 outputs a pulse to the terminal 1106 only when the outputs of all the AND gate circuits 1104 are 1. That is, when the input code at terminal 1101 matches the contents of memory circuit 1103, a pulse is output to terminal 1106. terminal 1106
is connected to the timer circuit 503 in FIG. As an example of the phase synchronized oscillation circuit 509 in FIG.
THEBELL SYSTEM TECHNICAL JOU
RNAL, Marchis8ue, 1962, PP. 5
59-602, page 561, FIG. 1 is known.

In this embodiment, it is also possible to replace the signal detection circuit 502 that detects a burst signal based on a prefix word with a circuit that detects a burst signal based on the presence or absence of radio waves.

In this case, the timer circuit 503 may be configured to count the time during which no radio waves are present, equal to or longer than the burst signal length TB, and reach a full count. The above embodiments have been explained using FSK as an example of the modulation method, but other modulation methods A
SK (Amplitude shift keying)
Even in the case of PSK (Phase Shift Keying), etc., the scope of the present invention is not restricted in any way, as only the configuration of the modem is changed.

As explained in detail above, the wireless communication system and frame synchronization device of the present invention enable the introduction of a time division multiple access system even to mobile wireless communication devices or small-scale fixed wireless communication devices. No need for a comparison station,
Moreover, it enables the simplification and digitalization of wireless communication systems, which has great effects.

[Brief explanation of drawings]

Figure 1 is a diagram showing the line configuration in the TDMA system, Figure 2
3A to 3G are diagrams for explaining the operation of the present invention, and FIG. 4 is an example of a wireless communication device to which the present invention is applied. FIG. 5 is a diagram showing an embodiment of the present invention, FIG. 6 a-f is a diagram showing the signal states of each part in FIG. 5, and FIG. 8 is a diagram showing details of the receiving device 402 in FIG. 4, and FIG. 9 is a diagram showing the burst shaping circuit 40 in FIG. 4.
9 in detail, and FIG. 10 is the transmitter 410 of FIG. 4.
FIG. 11 is a diagram showing the signal detection circuit 502 of FIG. 5 in detail. In FIG. 4, 402... Receiving device, 405
...Frame synchronizer, 407...P
CM encoder, 408...Memory, 409...
...burst shaping circuit, 410...transmitter, 401...receiving antenna, 411...
transmitting antenna. In FIG. 5, 502... signal detection circuit, 503... timer circuit, 505...
...And gate circuit, 507...Switch, 508...Timing circuit, 509...
...Phase synchronized oscillation circuit.

Claims (1)

[Claims] 1 In a TDMA wireless communication system that has multiple wireless lines between multiple wireless stations and separates each line by time division,
When a call is made, all lines are monitored, and when all lines are empty, the own line is captured and exclusively used by its own frame synchronization signal, and an idle line follows one of the at least one used line. When there is a burst signal of the one used line immediately before the empty line as a synchronization signal, the idle line is captured, and when the signal of the one used line used as a synchronization signal disappears during communication, the own TDMA wireless communication characterized in that the same line is monopolized by a frame synchronization signal, and when a burst signal occurs on the line temporally immediately preceding the own line, that signal is used as a synchronization signal to monopolize the own line. frame synchronization method.