JPS59218687A - Memory controller - Google Patents

Abstract

PURPOSE:To simplify the circuit constitution by judging that no nonvolatile memory is connected when the read-out date of contents of a nonvolatile memory are all set at an H or an L level to replace the read-out data with the initial setting data and having a normal action in the mode excepting the above- mentioned mode. CONSTITUTION:The system reset is applied to a memory control circuit 1 when a power supply is turned on and the data is read out of a nonvolatile memory 2 and fetched to the circuit 1. A pull-up resistance 3 fixes the input of the circuit 1 at an H level excepting the read-out mode of the memory data. If the memory is read when no memory 2 is connected, all memory contents are set at the H level while the memory data is read out since the input of the circuit 1 is fixed at the H level by the resistance 3. A memory data deciding circuit 1d jas ''llllll'' as the reference data and always compares the input data with said reference data. If no coinsidence is obtained from this comparison, the input data is delivered as it is to a D/A converting circuit 4. If the coincidence is obtained, the input data is replaced with the initial set value (''010000'',etc.) and delivered to the circuit 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Uses of the Invention] The present invention relates to a memory control device using nonvolatile memory.

[Background of the invention]

2. Description of the Related Art In television receivers and the like, many methods have been adopted to improve operability by storing final channel data, final volume data, etc. in a non-volatile memory. However, some low-end models do not use such memory and have only the minimum necessary functions. In such television receivers, which differ only in the presence or absence of memory, most of the circuits are shared, so additional circuits are required depending on the presence or absence of memory, which has the disadvantage of being expensive.

[Object of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a memory control device that overcomes the above-mentioned conventional drawbacks and does not require additional circuitry.

[Summary of the invention]

When reading the contents of a non-volatile memory, the present invention determines that the non-volatile memory is not connected when all of the read data is at H level or L level, and replaces it with predetermined initial setting data. Other than that, the circuit is configured to automatically determine the presence or absence of memory by performing normal operations, thereby simplifying the circuit.

[Embodiments of the invention]

The present invention will be described below with reference to the drawings.

The figure is a professional diagram showing an embodiment according to the present invention.

1 reads and writes the memory, determines the read data, and 1. ) / A memory control circuit 2 that outputs data to the A conversion circuit 4 stores data so that it always matches the data of the memory control circuit 1, reads the memory data when the power is turned on, and stores the data in the state immediately before the power is turned off. 1. , a non-volatile memory that stores data and has high impedance outputs except for memory outputs, 3.
For example, it is connected between the input of the memory control circuit 10 and the output of the non-volatile 2, and is used during periods other than the memory data read period, or
1. Non-volatile memory is connected. .

4 is a pull-up resistor for fixing the input of the memory control circuit to the I) level if it is not connected to the I)/A pull-up resistor for converting the digital 100 into an analog signal using data from the memory control circuit The conversion circuit 5 is a power supply circuit for supplying a waste source to the memory control circuit 1 and the nonvolatile memory 2. Although only one pull-up resistor 3 is shown in the figure, one pull-up resistor 3 is provided for each data line.

Next, the operation of the circuit will be explained.

Initially, when the power switch is turned on, power is supplied to the power supply circuit 5, and then to the memory control circuit 1 and the nonvolatile memory 2. When power is supplied, a system reset is activated in the memory control circuit 1, and data is read from the nonvolatile memory 2.1. .

Data is taken into the memory control circuit 1, and the data is input to the D/A conversion circuit 4, which outputs a DC voltage for electronic control etc. from the D/A control output terminal. At this time, the pull-up resistor 3 performs memory reading except during the memory data reading period.

Night circuit 10 input 4) This is for fixing to the J level, and if the memory control circuit 10 input also serves as a control key input, it can be used as a pull-up resistor for the key input.

Next, consider a case where the nonvolatile memory 2 is not connected. When a memory read operation is performed in the same manner as described above, since the input of the memory control circuit 1 is fixed at H level by the pull-up resistor, all memory contents are at H level during the memory data read period. That is, the data taken in by the memory data output circuit 1a and supplied to the memory data determination direction 111d is, for example, 1'1111.
11'', all 6 bits are at H level.The memory data determination circuit 1d uses 11'' as reference data.
1111”, input].

The data is constantly compared with this reference data, and if they do not match, the input data is output as is to the D/A conversion circuit 4, and if they match, the input data is replaced with the initial setting value (for example, 010000"). and D/A conversion circuit 4 to 1
− Output. Note that 1.16 is a memory data output circuit that inputs the write data obtained through the I/A conversion circuit 4 and the memory data discrimination circuit 1d into the memory 2;
1c is a memory read/write control circuit that specifies either a write mode or a read mode for the memory.

〔Effect of the invention〕

As described above, according to the present invention, switching is possible without requiring an external switching circuit with or without memory.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a memory control circuit according to the present invention. 1: Memory control circuit 2: Nonvolatile memory 1゜3: Promap resistor 4: D/A conversion circuit 5: Power supply circuit 6: Power switch

Claims (1)

[Claims] an input terminal to which data read from the memory is supplied, a pull-down resistor connected to the input terminal, a tree 1 storage unit that stores data equal to a value determined by the resistor as reference data; There is a 2nd storage unit that stores values, a determining unit 1 that compares the data at the input terminal with reference data to determine whether they match or do not match, and outputs a specific value from the 2nd storage unit in the case of a match, and determines if there is a mismatch. A memory control device characterized in that it comprises an output means for outputting data at an input terminal as is.