JPS59181622A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the adhesion of an exfoliating piece on a wafer during treatment and the generation of temperature trouble by vertically holding the wafer and growing a film through sputtering by using a heat-resistant electrostatic chuck, which can control a temperature. CONSTITUTION:With an electrostatic chuck 10, electrodes 12a (positive) and 12b (negative) are mounted into a heat-resistant insulating film 10a, a wafer 9 is sucked by an electrostatic field formed by these electrodes 12a and 12b, and no pawl is needed. A thermocouple 14 is disposed into the insulating film 10a to detect the temperature of the wafer at all times, and the temperature of the wafer 9 can be kept at a constant one by a temperature controller 17 mounted to the electrostatic chuck 10.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of growing an interlayer insulating film or the like by sputtering.

(2) Background of the technology For example, the formation of an insulating film between the eyebrows in the manufacture of large-scale integrated circuits (LSi) has conventionally been performed by forming silicon dioxide (5i02) I-backed film using the chemical vapor deposition (CVD) method. However, the processing temperature is high (400-600℃)
Therefore, when an aluminum (A6) wiring layer is formed, problems such as deterioration of the surface and unevenness of the grown film 2 in the step shape as shown in Fig. 1 have been experienced, and these problems have been solved. Film formation JK by water sputtering,
x, is transitioning. In FIG. 1, the reference numeral 1 indicates a semiconductor substrate.

The above-mentioned sputtering is carried out by disposing a stage 6 in which a cathode 7 and a cathode 9 are placed in a chamber 5 as schematically shown in FIG. The film is grown on the wafer 9 by introducing a processing gas into the wafer 5 and performing high-voltage discharge, and the processing temperature is as low as room temperature, and a bias voltage can be applied to the wafer. Therefore, 103-frequency (one-temperature) esochinking can be performed simultaneously with the J film growth, which has the advantage that the film can be grown flat even on a single step f↑, which is not indicated by reference numeral 3 in FIG.

(3) Regarding the prior art and problems, referring to FIG. 3, the parts that have grown into parts other than the wafer 9 due to spackling, such as the inner wall of the wafer 5 and the horns 8 that hold the wafer 9, It has been experienced that when the thickness reaches a certain level, cracks occur and the film easily peels off. Therefore, when the wafer 9 is placed horizontally as shown in the figure, there is a problem when peeled pieces of the film grown on the inner wall of the chamber 5 fall onto the surface of the wafer 9.

On the other hand, if the target 7, stage 6, and wafer 9 are arranged in the vertical direction 4i (as shown in FIG. 4),
The value remains 1 until the above-mentioned problem of the peeled piece falling from the chamber disappears, or the claw 8 becomes unusable because the primary particles grown on the claw 8 are peeled off and deposited on the wafer 9. In addition, when growing silicon dioxide (5i02) H used for tri-level, which is a mask pattern forming technology, it is necessary to grow the resist that has already been applied or at 150°C.
Since the wafer deforms at temperatures above this level, there is a problem in that it is necessary to keep the wafer at a low temperature during processing, or the conventional technology cannot control the temperature of the wafer.

Note that tri-level processing means, for example, when forming a fine pattern on the back, a Δβ layer is formed, a resist IW layer, a 5102 film, and a resist layer are formed on top of the Δβ layer, and then the upper I-resist layer is formed. Starting with the patterning of #7, the underlying resist layer is patterned, and then the patterning of 8βJ- is performed.

(4) Purpose of the Invention The present invention solves the above-mentioned problems of fjt, b.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that allows the growth to be performed without depositing a tilt piece and without keeping the wafer at a constant temperature.

(5) Structure and purpose of the invention' According to the present invention, the temperature of the sample is reduced to 1 liters.
To provide a method for manufacturing a semiconductor device, characterized in that a film is grown on the sample by sputtering while holding the sample vertically using a thermostatic electrostatic chuck equipped with temperature control means as described in Section 1. achieved by

(6) Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.

FIG. 5 is a diagram showing the structure of an electrostatic chuck according to an embodiment of the invention. Referring to the figure, the electrostatic chuck 10 has suction electrodes 12a (positive) and 12b ( The wafer 9 is attracted by the electrostatic field formed by these electrodes 12a and 12b, which has the advantage of not requiring claws as in the conventional case.

Furthermore, a thermocouple 4 is disposed within the insulating film 10 to constantly detect the temperature of the wafer, and a temperature control device 17 provided in the electrostatic chuck 10 can maintain the temperature of the wafer 9 at a constant temperature. can.

The temperature control device 17 heats the wafer 9 at a temperature of 100 to 200°C, for example when removing adsorbed moisture on the wafer 9.
When it is necessary to maintain the temperature at
If it is not possible to maintain the temperature below 100°C, a cooling system with a structure that circulates cooling water can be used. Incidentally, an increase in the temperature J- of the wafer 9 occurs when, for example, the applied voltage is increased in order to improve the film growth rate, or when the distance between the wafer and the target saw 1 is shortened.

FIG. 6 is a schematic diagram of a sputtering apparatus using the heat-resistant electrostatic chuck mentioned above.
5, the electrostatic chuck 10 described above is disposed in a vertical direction, and a target 19 is disposed opposite to this, and the target 19 is connected to electromagnets 20a (S type) and 20b.
(N type) is provided on a table 23 that is rotated by a motor 22 that has an internal motor 22 installed therein. The rotation of the table 23 is caused by the electromagnet 2
0a and 20b have an effect that makes them uniform and strong, and as a result, the electrons are captured by this magnetic flux, and the gas is activated, which increases the plasma density and the processing speed of film growth. There is a rhino fruit that improves.

Note that a water cooling device 21 is provided on the stand 23 in which the electromagnets 20a, 20b are installed to prevent the electromagnets 20a, 20b, etc. from being heated. Further, the chamber 15 is provided with an exhaust pipe 17 which is connected to a throat air device (not shown) via an inlet pipe 16 for processing gas and a valve 18.

Since the apparatus has the above-described structure, there is no possibility that peeled pieces will adhere to the wafer 9 as in the conventional method, and at the same time, the temperature of the wafer 9 can be easily controlled, thus solving the problems in conventional film growth. In addition, in the present invention, it is possible to lower the bias voltage only to the wafer as before.
A flat, high-quality film can be grown.

(7) Effects of the Invention - As explained in detail, according to the present invention, by using a 11111 thermal electrostatic chuck with temperature control, film growth by sputter linking can be performed while holding the wafer vertically. As a result, there is no possibility of peeling debris adhering to the wafer during processing or temperature failure, which is a major advantage in improving the yield in the manufacture of semiconductor devices and improving the reliability of semiconductor devices.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a film grown by the conventional CVU method, Fig. 2 is a cross-sectional view of a film grown by the sputter link method, and Figs. 5 and 5 are diagrams showing the structure of an electrostatic chuck according to the present invention, and FIG. 6 is a diagram showing the structure of a sputter link device using the electrostatic chuck. 5.15--9 Chamber, 61. Stage, 7.19-
Kuge Nodo, 8-claw, 9-wafer, 1O-ii
ll[Thermal electrostatic charge, 11-Temperature control device, 1
2a, 12b - Adsorption electrode, 13 - Coil, 14 - Thermocouple Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device, which comprises growing a film on the sample by sputtering while holding the sample vertically using a heat-resistant electrostatic chuck equipped with a temperature control means for adjusting the temperature of the sample.