JPS59136871A - Temperature compensation logalithm circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electrical circuit that generates an output signal according to a logarithmic function. More particularly, this invention relates to an improved circuit for obtaining a temperature independent logarithmic output signal.

Over the years, 91 different analog logarithmic circuits have been used in the industry. These circuits included a log amplifier (with only one variable input signal) and a log ratio circuit six (with two variable input signals). In general, the logarithmic function is the difference voltage kT/71 in, used as the fundamental output signal, /
In step 2), a pair of opposing P-Ns are connected, each passing current I2.
Set by bond. Since the output signal is proportional to absolute temperature, it is clear that some temperature compensation must be made in circuits that are required to work accurately at variable temperatures.

There have been problems in obtaining temperature compensated logarithmic circuits suitable for fabrication in monolithic form, ie, integrated circuit chips.

Generally, in conventional circuits.

A resistor with a high temperature coefficient (Tc) is used to provide certain temperature compensation. However, it is difficult to obtain such resistance monolithically.

As a result, external high Tc resistors are commonly used.

This is not sufficient since the product must be manufactured in modular rather than entirely monolithic form.

According to the present invention, a logarithmic circuit (log-amp or log-ratio) is provided in which the need for special elements such as temperature-compensating resistors is eliminated by using a compensation circuit based solely on junction behavior. Ru.

In a preferred embodiment of the present invention, a pair of opposing PN junctions are provided with an input current of -9.degree. to obtain an elementary logarithmic relationship. The log ratio signal obtained is proportional to the absolute temperature (PTA
T) is coupled to a compensation circuit including a second pair of P-N junctions having a common emitter supplied by a power source that generates a current.

The PTAT current divided between the second pair of junctions is the log ratio (i
The temperature-induced change introduced into the junction of the first pair is compensated by an equal and opposite temperature-induced change introduced by the PTAT current source. A final output signal is obtained that is proportional to the modulation depth at the second pair of junctions, and this output signal is independent of temperature.

Other objects, features and advantages of the invention will become apparent from the following detailed description of the embodiments illustrated in the drawings.

FIG. 1 shows a pair of matched transistors Q+, Q with a common emitter connection point to form an opposed P-'N junction.
A relatively simple example of a logarithmic circuit with 2 is shown.

The base of Q is grounded, and the collector is connected to input terminal 10 to receive a variable human power signal. This input terminal is also connected to the input of a high gain inverting amplifier 12 whose output drives the common emitter junction of Q, .

The collector of Q2 receives the current from the power supply.

This current is a constant current for a log amp, and a variable current for a log ratio phase. The base of Q2 is connected to ground through a resistor R and to the collector of transistor Q, which supplies current as required. Q.

Its base is grounded, and its emitter is connected to the emitter of a matching transistor Q4 whose collector is grounded.

The common emitter of Q3, Q4 is connected to a power supply T which generates a PTAT (proportional to absolute temperature) current.
Qs flows a part of the PTAT current E, and Qa flows the remaining current (ix) T.

It can also be seen that the collector current of Q3 passes through the resistor R. Therefore, the voltage at the top of the resistor will be TR with respect to ground. Therefore, the equation for the loop from ctj(7) grounding -7 to the grounding pace of Q3 is expressed as follows.

Here, 1° is the junction saturation current.

To simplify the analysis for purposes of illustration only, the product I,R is set to the value kT/q. In place of equation (1), the following equation is obtained.

If we combine each term and divide by kT/9.

Or -105 (4).

Therefore, the modulation depth "X" is directly proportional to the desired logarithmic ratio and is not affected by temperature. To get the corresponding output signal //X
It is only necessary to generate an output signal corresponding to “.

This is achieved by using a fifth pair of matched PN junctions Q, , , Q, 6 coupled to the Qa base and arranged in mirror image fashion, as shown in FIG.

Constant current Riko RFi, Qs - connected to the common emitter of Q4. Note that the current flowing through Q6 is □, so the output current is . , acts as. To obtain the corresponding output voltage, the collector of Q6 can be connected to an inverting high gain amplifier 20 with a feedback resistor R5.

Then, the output voltage is expressed by the following equation.

Therefore, it can be seen that the output voltage is independent of temperature and can be obtained without requiring special elements such as high TO resistance. Therefore, such a circuit is easy.

Can be formed into a completely monolithic form.

In the log amplifier mode where Q4 is kept constant, the error signal at one node N is not so important because it is driven by current.
- The small base current of Qs is negligible. IT
For example, U.S. Patent No. 3,940,760 (Prokara)
+”g of the general type shown in FIG.

easily generated by Furthermore, if R and AIR are almost the same, their resistance errors will be similar, so the 9 circuit does not require good log matching from Q3 to Q6.

For example, to obtain a very accurate log ratio circuit, one node N
To obtain good control and substantial grounding.

A low gain non-inverting amplifier may be inserted at the circuit point indicated by A in FIG. FIG. 2 shows another circuit configuration in which the node N is placed very close to ground in order to satisfy . The analysis of this balanced circuit is clear and becomes the following equation.

2. Merely by way of example, FIG. 6 shows how some of the details of the actual circuit may be constructed in accordance with FIG. The function of this circuit is clear in most respects. Q7 and Q8
By reducing the base current from Q4 to Q6,
Also, providing overhead space for the collectors of the four transistors serves two purposes. , and , are set to fairly high values. This makes the resistor R so small that the error in the output due to the base current error of Ql at the high input end of the signal range becomes negligible.

Again in FIG. 2, 'core' transistors Q, and Q2
It can be seen that the finite beta of is negatively affected. More specifically, the base currents of Q and Q2 do not change the voltage across resistor R, which is always VTln, (1,/min,)
The base current changes the modulation index value required to set this voltage.

Therefore, an error occurs in the final output. FIG. 4 shows a modification of the core part of the arrangement of FIG. 2 that avoids this problem in the following way. Ql4 produces a base current equal to the combined pace current of Ql and Q2. Qi2 and QjR are Q, and Q
2 forms an emitter-coupled pair that scales this current in the same way that 2 scales the total emitter current H+12. By cross connection.

When the base current lack degree δ(-='/B) is small,
The collector current of Q12 will be very equal to the pace current of Q2, and similarly the collector current of Q12 will be very equal to the pace current of Q1. Therefore, the base current of each resistor is δ(k, juku 2), and the net difference error is zero.

Although some preferred embodiments of the present invention have been disclosed above,
This is for the purpose of illustrating the invention and is not to be construed as limiting the invention, as it is obvious that many modifications may be made by those skilled in the art who practice the invention.

[Brief explanation of the drawing]

Fig. 1 is a route diagram of a relatively simple basic circuit illustrating the principle of the present invention, Fig. 2 shows a modified embodiment using a balanced circuit configuration, and Fig. 5 shows details of the circuit of the type shown in Fig. 2. It is a diagram. Q...Transistor, G...Current, R...Resistance. 12...Amplifier.

Claims (1)

Claims: (1) In a log circuit that generates an output signal that is proportional to the logarithm of an input signal and that does not undergo temperature-induced changes. input means including means for obtaining a first signal responsive to the input signal and proportional to the product of the logarithm of the input signal and absolute temperature; a PTA for generating a second signal and coupled to the input means;
T, circuit means comprising a source (proportional to absolute temperature); said circuit means further comprising means for modulating the magnitude of said second signal according to said logarithm while canceling temperature-related factors of said two signals; and output means for obtaining an output signal corresponding to modulation of the second signal. (2) The input means comprises differentiating means for generating, in response to an input signal and a reference signal, the first signal proportional to the logarithm of the ratio of the input and reference signals.
The circuit described in section. 8. The circuit of claim 2, wherein said differentiating means comprises first and second transistors having a common emitter, and said input and reference signals are currents flowing through said transistors. (4) The circuit means comprises a resistor means coupled to the base of the second transistor and means for coupling the PTAT source to the resistor means to obtain a PTAT current flow. The circuit described. (5) The coupling means includes sixth and fourth transistors whose emitters are connected together, and the resistor means is connected between the collector and base of the third transistor,
4. The circuit of claim 3, wherein the PTAT source is connected to the emitters of the sixth and fourth transistors. (6) The base of the first transistor is connected to a reference potential, and the base of the second transistor is connected to the collector of the sixth transistor. 6. The circuit according to claim 5, wherein the base of the sixth transistor is connected to a reference potential. (7) The base of the first transistor is connected to a reference potential, and the circuit means includes a resistor connected between the base of the second transistor and the reference potential, and the circuit means includes a resistor connected between the base of the second transistor and the reference potential.
7. The circuit of claim 6, wherein a source is coupled to said resistor to pass a PTAT current flow to obtain said second signal. (8) a high gain amplifier having an output connected to a common emitter of the first and second transistors and an input connected to the collector of the first transistor; 8. The circuit of claim 7, wherein the input of the amplifier is connected to an input terminal for receiving and passing an input current to the first transistor. (9) The circuit according to claim 8, wherein the reference signal is a current source connected to the collector of the second transistor. μ0) The circuit means further comprises third and fourth transistors having a common emitter connection. The sixth transistor is coupled to the resistor to conduct its current, and the circuit means adjusts the PTAT source between the third and fourth transistors in proportion to the current through the transistor acting as a modulation factor responsive to the current ratio. 8. A circuit according to claim 7 for dividing current from . including fifth and sixth transistors having αD emitters connected together, said fifth and sixth transistors being coupled to said fifth and fourth transistors, and said output means corresponding to a current modulation in said sixth transistor. 11. The circuit of claim 10, including means for replicating current modulation in six transistors, said output means comprising means for obtaining an output signal in response to the flow of current through said sixth transistor. @ with a first pair of matched transistors having a common emitter. the collectors of said transistors being connected to respective input terminals for receiving the input terminals; an amplifier having an input coupled to one of said input terminals and an output connected to said common emitter; each having one end connected to said pair of transistors; a pair of resistors connected to their bases; the other ends of said resistors being integrally connected to a reference potential; and a second pair of matched transistors having emitters connected together, with collectors connected to the bases of said first pair of transistors, respectively. a PTAT current source connected to said second pair of emitters and causing a flow of current therein and through a respective resistor modulated according to the logarithm of the ratio of said input currents; an output according to the modulation of said PTAT current; and output means for obtaining a signal. Balanced log ratio circuit. [alpha]] The output means includes a fifth pair of track filters matched to the second pair, the sixth pair of gate transmitters are integrally connected to a constant current source, and the sixth pair of transistors is connected to the second pair of track filters. A current coupled to the second pair and passing through the fifth pair is modulated corresponding to the modulation of the current in the second pair, and the output means is responsive to the current flowing through one of the transistors of the fifth pair. The circuit according to claim 12, comprising a current mirror connected to the collectors of the sixth pair of transistors, the output means being connected to the collector of one of the fifth pair of transistors. A circuit as described in claim 16. (b) In a method of obtaining a temperature-independent signal corresponding to the logarithm of an input signal. obtaining a first signal representative of the product of the logarithm of said input signal and absolute temperature; obtaining a second signal from a P, T A' T current source; combining said first and second signals; setting the magnitude of the second signal to cancel the temperature dependence of the two signals;
said method comprising: modulating the magnitude of a signal; obtaining an output signal by modulating said second signal. (G) Regarding the first signal, one causes a first current corresponding to the input signal to flow, and the other causes a second current to flow. 16. A method according to claim 15, obtained by a pair of opposed PN junctions. 17. The method of claim 16, wherein modulation of the second signal is performed by a second pair of opposed PN junctions. (18) including means for avoiding finite beta effects in the first pair of transistors, further comprising a means for avoiding finite beta effects in the first pair of transistors, and further comprising a means for avoiding finite beta effects in the first pair of transistors;
a fifth pair of emitter-coupled transistors connected to the bases of the first pair of transistors; The collector of each of the third pair of transistors is connected to the base of the other transistor of the third pair of transistors, the collector is connected to the emitter of the first pair of transistors, and the base is connected to the emitter of the third pair of transistors. 13. The circuit according to claim 12, further comprising a further connected transistor.