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JPS5913608A - Manufacture of thin metallic nitride film - Google Patents

Manufacture of thin metallic nitride film

Info

Publication number
JPS5913608A
JPS5913608A JP11991482A JP11991482A JPS5913608A JP S5913608 A JPS5913608 A JP S5913608A JP 11991482 A JP11991482 A JP 11991482A JP 11991482 A JP11991482 A JP 11991482A JP S5913608 A JPS5913608 A JP S5913608A
Authority
JP
Japan
Prior art keywords
bias voltage
nitride film
thin metallic
metallic nitride
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11991482A
Other languages
Japanese (ja)
Other versions
JPS627263B2 (en
Inventor
Shuichi Kanamori
金森 周一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11991482A priority Critical patent/JPS5913608A/en
Publication of JPS5913608A publication Critical patent/JPS5913608A/en
Publication of JPS627263B2 publication Critical patent/JPS627263B2/ja
Granted legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021Reactive sputtering or evaporation
    • C23C14/0036Reactive sputtering

Landscapes

  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To obtain easily a thin metallic nitride film with small internal stress and low specific resistance by applying bias voltage having a wave-form repeating alternately a zero state and a negative state of the voltage to a substrate in reactive sputtering. CONSTITUTION:Nitrogen is introduced into a chamber up to a prescribed partial pressure, Ar is introduced up to a prescribed total pressure, and electric discharge is started. Bias voltage having a wave-form repeating alternately a zero state and a negative state is applied to a substrate from a bias power source, and a thin metallic nitride film is deposited by reactive sputtering. By this method a thin metallic nitride film with small internal stress and low specific resistance is easily obtd. The film is used as the material of electrodes of a semiconductor integrated circuit, etc.

Description

【発明の詳細な説明】 本発明は内部応力が小さく、かつ比抵抗のl」\さい金
属窒化物薄膜の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a metal nitride thin film with low internal stress and low specific resistance.

一般にチタ/、モリブデン、タンタル等の高融点金属の
窒化物はきわめて高い融点と高い機械的硬度を有し、熱
的、化学的にも安定であるために各独装置、部品の機械
的・熱的保護膜として使用され、最近ではさらに十尋体
集積回路の高耐熱電極羽村の一つとして実用化されつつ
ある。
In general, nitrides of high-melting point metals such as titanium, molybdenum, and tantalum have extremely high melting points and high mechanical hardness, and are thermally and chemically stable. Recently, it has been put into practical use as one of the highly heat-resistant electrodes for integrated circuits.

金属窒化物薄膜を半専体集積回路の電極材料として用い
る場合、比抵抗が低いことが第1の条件である。
When using a metal nitride thin film as an electrode material for a semi-dedicated integrated circuit, the first condition is that the specific resistance is low.

一般に、チタン、ジルコニウムなどの窒化物はバルクで
比較すると、もとの金属元素よりも比抵抗が小さくなる
ことが知られている。しかし、電極材料に用いる厘さ数
100〜数1ooo Xの薄膜では、種々の散乱機構の
ために比抵抗は一般に高くなる傾向があシ、これを下け
ることが一つの1袂な技術となっている。
Generally, it is known that nitrides such as titanium and zirconium have a lower resistivity than the original metal element when compared in bulk. However, in thin films with a thickness of several 100 to several 100 X used as electrode materials, the resistivity generally tends to be high due to various scattering mechanisms, and reducing this is one of the advanced technologies. ing.

例えば、窒化チタン薄膜を、窒素・アルゴン混合ガス中
の反応性スパッタリングによシ得る場合、窒素分圧、窒
素・アルゴン混合ガス圧力を増加させると窒化チタン薄
膜の元素組成膜中の不純物の影響によ〕比抵抗は増加す
るため、通常は放電が持続できる最小の圧力に設定され
る。また、さらに比抵抗を下げるために基板に負の直流
バイアス電圧を印加することが効果的である。
For example, when a titanium nitride thin film is obtained by reactive sputtering in a nitrogen/argon mixed gas, increasing the nitrogen partial pressure and the nitrogen/argon mixed gas pressure will reduce the effect of impurities in the elemental composition of the titanium nitride thin film. Since the specific resistance increases, the pressure is usually set to the minimum pressure that can sustain the discharge. Furthermore, it is effective to apply a negative DC bias voltage to the substrate in order to further lower the resistivity.

第1図は基板に負のバイアス電圧を印加したスパッタリ
ング装置の概略図を示すもので、図において1は真空チ
ャンバ、2は排気糸、3はチタン。
FIG. 1 shows a schematic diagram of a sputtering apparatus in which a negative bias voltage is applied to a substrate. In the figure, 1 is a vacuum chamber, 2 is an evacuation thread, and 3 is titanium.

モリブデン、タンタル等の金属ターゲット、4はしやへ
い板、5は高周波電縣回路、6は基板、7はバイアス電
蝕、8はガス導入口、9は流量調節弁である。第2図お
よび第3図は窒化チタン薄膜の場合の膜の比抵抗と、膜
内に発生した内部応力についてそれぞれ基板バイアスの
効果を示したグラフである。ρは比抵抗、σは内部応力
(実線で示す)を示す。このデータは、窒素分圧2.8
 mTOrr 。
4 is a metal target such as molybdenum or tantalum, 4 is a thin plate, 5 is a high frequency electric circuit, 6 is a substrate, 7 is a bias electrolytic corrosion, 8 is a gas inlet, and 9 is a flow rate control valve. FIGS. 2 and 3 are graphs showing the effect of substrate bias on the specific resistance of a titanium nitride thin film and the internal stress generated within the film, respectively. ρ indicates specific resistance, and σ indicates internal stress (shown as a solid line). This data indicates that the nitrogen partial pressure is 2.8
mTOrr.

窒素・アルゴン混合ガス圧力16.8 m Torr 
、高周波電力400Wの場合である。
Nitrogen/argon mixed gas pressure 16.8 m Torr
, in the case of high frequency power of 400W.

このように、基板バイアス印加は窒化チタン薄膜の比抵
抗ρの低減に対してきわめて効果的ではあるが、反IM
]、膜内に著しい内部応力σが発生するため、半畳体集
積回路を製造する際にウェハの(−りにより微細パター
ンの形成か困難となること、腹が厚い場合にはクラック
やはがれか発生するなど著しい障害の原因となっていた
Thus, although application of substrate bias is extremely effective in reducing the resistivity ρ of titanium nitride thin films,
], significant internal stress σ occurs within the film, which makes it difficult to form fine patterns due to wafer (-) when manufacturing semiconducting integrated circuits, and cracks and peeling occur when the wafer is thick. This caused serious problems such as:

これを解決する一つの方法に、第2図に示す遷移領域す
なわち、比抵抗および内部応力が急変する点にバイアス
電圧を設定し、比抵抗も内部応力も中程度の膜を得るこ
とが考えられるか、遷移領域を決めるバイアス電圧の範
囲がきわめて狭く、丹現住を得るのが著しく困難であっ
た。
One way to solve this problem is to set the bias voltage in the transition region shown in Figure 2, that is, the point where resistivity and internal stress suddenly change, to obtain a film with intermediate resistivity and internal stress. In addition, the range of bias voltage that determines the transition region is extremely narrow, making it extremely difficult to obtain the desired value.

本発明は以上の問題を解決するために、基板バイアスと
してバイアス電圧が零の状態と負の状態とか交互にくり
返えされるバイアス電圧を印加することによシ金属窒化
物薄j摸の内部応力ならびに比抵抗を実用上問題のない
レベルに1で下けることを目的とするものである。
In order to solve the above-mentioned problems, the present invention aims to reduce the internal stress of a metal nitride thin film by applying a bias voltage that alternates between a zero state and a negative state as a substrate bias. Also, the purpose is to lower the specific resistance by 1 to a level that poses no problem in practice.

前記の目的を達成するため、本発明は畳重性を有する金
属窒化物薄膜を反応性スパッタ伝で形成する金属窒化物
薄膜の製造方法において、基板バイアスを印加し、かつ
そのバイアス電圧が苓の状た。と負の状!訳か交互にく
り返されてなる基板バイアスを用いることを特徴とする
金属窒化物111iQの製造方法を発明の要旨とするも
のである。
In order to achieve the above object, the present invention provides a method for manufacturing a metal nitride thin film having a folding property by reactive sputtering, in which a substrate bias is applied and the bias voltage is The situation was And a negative state! The gist of the invention is a method for manufacturing metal nitride 111iQ, which is characterized by using alternately repeated substrate biases.

次に本発明の実施例を紐附図面について説明する。なお
実施例は一つの例示であって、本発明の精神を逸脱しな
い範囲内で、種々の変更あるいは改良を行いうろことは
云う1でもない。
Next, embodiments of the present invention will be described with reference to the accompanying drawings. It should be noted that the embodiments are merely illustrative, and that various changes and improvements may be made without departing from the spirit of the present invention.

本発明の実施に用いられる装置は第1図に示すものであ
り、手順はまずチャンバ1内を排気後、窒素を所定の分
圧になるまでガス導入口8に設けられた流′jJf調節
弁9を調節することによシ導入する。つづいて、アルゴ
ンを全圧力が所定の圧力になるまで導入したのち放電を
開始させ、金属窒化物薄膜を堆積させる。基板バイアス
電源7にはバイアス電圧か苓の状態と負の秋、閤が交互
にくり返す波形の電圧を加える。第4図はバイアス電圧
波tbの例を示すものであシ、デユーティ1/2の矩形
波である。電圧の大きさ一■は例えば−50Vであり、
周期Tは例えば100mBである。第5図は、バイアス
電圧波形の他の例を示すものであり、商用電縣を半波整
流するたけで簡単に得られる脈流バイアス電圧波形であ
る。電圧の大きさ−Vは整流する前の交流電圧の実効値
をvrmsとすれば、v = i v、、6 で与えられる。周期Tは画用周波数か50 Hzの場合
、20nI8である。
The apparatus used to carry out the present invention is shown in FIG. 1, and the procedure is to first evacuate the inside of the chamber 1, and then pump nitrogen through the flow control valve provided at the gas inlet 8 until a predetermined partial pressure is reached. This is introduced by adjusting 9. Subsequently, argon is introduced until the total pressure reaches a predetermined pressure, and then discharge is started to deposit a metal nitride thin film. To the substrate bias power supply 7, a bias voltage is applied with a waveform that alternates between a low state, a negative fall, and a low state. FIG. 4 shows an example of the bias voltage wave tb, which is a rectangular wave with a duty of 1/2. The magnitude of the voltage is, for example, -50V,
The period T is, for example, 100 mB. FIG. 5 shows another example of the bias voltage waveform, which is a pulsating bias voltage waveform that can be easily obtained by simply half-wave rectifying the commercial power line. The magnitude of the voltage -V is given by v=iv, 6, where vrms is the effective value of the AC voltage before rectification. The period T is 20nI8 when the image frequency is 50 Hz.

一例として、窒化チタン薄膜を窒素分圧2.8m’ro
rr 、窒素・アルゴン混合ガス圧力を16.8 m 
Torr 。
As an example, a titanium nitride thin film with a nitrogen partial pressure of 2.8 m'ro
rr, nitrogen/argon mixed gas pressure 16.8 m
Torr.

高周波電力400Wとし、がっ、基板バイアス電圧とし
て実効値30V 、 40Vおよび50Vの交流電圧を
半波整流して得た負の脈流バイアス電圧を印加して堆積
した窒化チタン薄膜の比抵抗および内部応力を第2図お
よび第3図に破線で示す。ただし、横軸はバイアス電圧
の実効値で表しである。第2図および第3図に破線で示
したデータから、直流バイアス電圧印加の場合に見られ
た比抵抗の急しゅんな変化か緩和され、かつ、内部応力
の発生し始める領域かバイアス電圧の高い側に移るため
、内部応力が小さくかつ比抵抗が実用上問題にならない
程度に低い膜を容易に得ることができることかわかる。
The specific resistance and internal structure of the titanium nitride thin film deposited by applying a negative pulsating current bias voltage obtained by half-wave rectification of AC voltage with an effective value of 30 V, 40 V, and 50 V as a substrate bias voltage with a high frequency power of 400 W. Stresses are shown in dashed lines in FIGS. 2 and 3. However, the horizontal axis represents the effective value of the bias voltage. From the data shown by the broken lines in Figures 2 and 3, it is clear that the rapid change in resistivity observed when DC bias voltage is applied is relaxed, and that the region where internal stress begins to occur is located at high bias voltage. It can be seen that it is possible to easily obtain a film with small internal stress and low specific resistance to the extent that it does not pose a problem in practice.

以上のように、電圧か零および負の値を交互にくり返す
バイアス電圧を印加した場合の窒化チタン薄膜の成長の
機構を考察すると、基板パイブスが零の場合に得られる
比抵抗は大きい〃・内部応力の小さいj挨と、基板バイ
アスか負のイu’iの場合に得られる内部応力は大きい
が比抵抗が小さな膜とが交互に成長することにより、両
方の中間の膜が形成されるものと考えられ、結果的にみ
れば、両者の長所を兼ね備えた膜と考えることもできる
As mentioned above, when considering the mechanism of growth of a titanium nitride thin film when applying a bias voltage that alternately repeats zero and negative values, the specific resistance obtained when the substrate pipe is zero is large. A film intermediate between the two is formed by alternately growing a film with small internal stress and a film with large internal stress but small resistivity obtained in the case of substrate bias or negative i'i. As a result, it can be considered as a membrane that combines the advantages of both.

以−1二説明した様に、本発明によれば反応性スパッタ
リングにおいて基板バイアス電圧として、電圧が苓およ
び負の状、法を交互にくり返す波形のバイアス屯IJE
を印加することにより、内部応力が小さく、かつ比抵抗
の小さい金属窒化物#膜を容易に得ることができ、この
薄膜を半導体集積回路の電極の一部に、例えは拡散障壁
層として使用すれOJ′、耐熱性ならびに信頼性に優れ
た半導体集積回路が尖部り艮く、k隣的に実現すること
ができる幼果を有するものである。
As explained below, according to the present invention, the substrate bias voltage in reactive sputtering is a bias voltage IJE with a waveform in which the voltage alternates between positive and negative voltages.
By applying , a metal nitride # film with low internal stress and low resistivity can be easily obtained, and this thin film can be used as a part of the electrode of a semiconductor integrated circuit, for example, as a diffusion barrier layer. OJ', a semiconductor integrated circuit with excellent heat resistance and reliability has a sharp tip and a young fruit that can be realized in a k-adjacent manner.

4.1而の111)年な説明 第1図はスパッタリング装置の概略図、第2図および第
3図は窒化チタン薄膜を高周波反応性スパッタリング法
により形成した場合の膜のそれぞれ比抵抗と内部応力に
ついてノ古板直流バイアス効果(火脚)および基板バイ
アスとして、その′電圧が苓および負の値を交互にくり
返す波形のバイアス電圧を印加した場合の効果(破鮒)
を示すグラフ、第4図および第5図は本発明の特徴とす
るバイアス電圧波形の一例を示すものであり、それぞれ
矩形および脈流バイアス電圧である。
4.1 Explanation of 111) Figure 1 is a schematic diagram of the sputtering equipment, and Figures 2 and 3 show the specific resistance and internal stress of a titanium nitride thin film formed by high-frequency reactive sputtering, respectively. The effect of applying a bias voltage with a waveform in which the voltage alternates between low and negative values as a substrate bias and the effects of applying a bias voltage (Hafuna)
4 and 5 show examples of the bias voltage waveforms that characterize the present invention, and are rectangular and pulsating bias voltages, respectively.

1・・・真空チャンバ、2・・排気系、3・・金属ター
ゲット、4・・しやへい板、5・・筒周波%Vtx回路
、6・・基板、7・・バイアス電蝕、8・・ガス導入口
、9・・流量調節弁 特許出願人 第1図 山 第2図 Vs(V) 第3図 Vs(V)
1... Vacuum chamber, 2... Exhaust system, 3... Metal target, 4... Shiyahei plate, 5... Cylindrical frequency %Vtx circuit, 6... Substrate, 7... Bias electrolytic erosion, 8...・Gas inlet, 9...Flow control valve Patent applicant Figure 1 Figure 2 Vs (V) Figure 3 Vs (V)

Claims (1)

【特許請求の範囲】[Claims] 寺電性を有する金属窒化物薄膜を反応性スパッタ法で形
成する金属窒化物薄膜の製造方法において、基板バイア
スを印加し、かつそのバイアス電圧が岑の状態と負の状
態が交互にくり返されてなる基板バイアスを用いること
を特徴とする金属窒化物薄膜の製造方法。
In a method for manufacturing a metal nitride thin film having electrical properties by a reactive sputtering method, a substrate bias is applied, and the bias voltage is alternately in a low state and a negative state. A method for producing a metal nitride thin film, characterized in that a substrate bias is used.
JP11991482A 1982-07-12 1982-07-12 Manufacture of thin metallic nitride film Granted JPS5913608A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11991482A JPS5913608A (en) 1982-07-12 1982-07-12 Manufacture of thin metallic nitride film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11991482A JPS5913608A (en) 1982-07-12 1982-07-12 Manufacture of thin metallic nitride film

Publications (2)

Publication Number Publication Date
JPS5913608A true JPS5913608A (en) 1984-01-24
JPS627263B2 JPS627263B2 (en) 1987-02-16

Family

ID=14773308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11991482A Granted JPS5913608A (en) 1982-07-12 1982-07-12 Manufacture of thin metallic nitride film

Country Status (1)

Country Link
JP (1) JPS5913608A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6393861A (en) * 1986-10-06 1988-04-25 Nec Corp Method for depositing low-stress thin film
JPS6415366A (en) * 1987-07-09 1989-01-19 Matsushita Electric Ind Co Ltd Preparation of composition modified nitrided alloy film
JPH02138456A (en) * 1987-06-30 1990-05-28 Hitachi Ltd Sputtering method, equipment and applied products
JP2007005423A (en) * 2005-06-22 2007-01-11 Fuji Electric Device Technology Co Ltd Semiconductor device and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5538947A (en) * 1978-09-12 1980-03-18 Fujitsu Ltd Forming method of metallic compound coating

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5538947A (en) * 1978-09-12 1980-03-18 Fujitsu Ltd Forming method of metallic compound coating

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6393861A (en) * 1986-10-06 1988-04-25 Nec Corp Method for depositing low-stress thin film
JPH02138456A (en) * 1987-06-30 1990-05-28 Hitachi Ltd Sputtering method, equipment and applied products
JPS6415366A (en) * 1987-07-09 1989-01-19 Matsushita Electric Ind Co Ltd Preparation of composition modified nitrided alloy film
JP2007005423A (en) * 2005-06-22 2007-01-11 Fuji Electric Device Technology Co Ltd Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPS627263B2 (en) 1987-02-16

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