JPS5898927A - Etching method for silicon substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an etching method for forming a plurality of fine etching grooves with different depths in the same silicon (hereinafter referred to as 5i) substrate.

Hydrazine (N*Ht) and potassium hydroxide (KOH)
Wet etching method using CCZ, Pct
In a so-called dry etching method such as plasma etching using a chlorine compound gas such as , etching is possible depending on the stwt crystal plane. As shown in FIG. 1, when such an etching method is applied to a 3i substrate 1 whose main surface is the (100) plane (approximately 55
- The inclined nine (l l, l) surface 2 remains almost unetched, forming a figure 7-shaped groove 3 where etching stops; the etching depth can be changed by adjusting the width of the groove. can. However, the width of the groove in this case is limited to about 1.4 times the depth, and it is not possible to form a groove any finer than this.

An object of the present invention is to provide an etching method for forming grooves of different depths in a Si substrate, which allows formation of finer grooves than conventional methods.

Hereinafter, the present invention will be explained in detail with reference to Examples.

Example (A Si substrate having a main surface of the 1003 plane is etched using a conventional crystal plane dependent etching method to create an etching difference and not to stop until the etching is completed. In this way, the first etching process is performed. Through the etching process, a step is first created, and then a narrow width is created as shown in Figure 2 (b) K.
Etching is added using a second etching process which is not dependent on the crystal plane and has a small amount of side etching so that the groove 11 has a predetermined depth DI. As an etching method suitable for this second etching step, for example, a reactive sputter etching method using a mixed gas of CCl2 and O2, which is a type of dry etching method, is suitable. 5tab high frequency power density 0.4W
/cm'' etching condition, B i with respect to StO, which is the etching mask 16.

can be selectively etched (selection ratio 20) and side etching can be eliminated.

The angle between the (100) and (111) planes of the Ss crystal is 5
5 degrees, the width of the groove that can be formed by the above etching method is in the following range.

0<Ll　<1.4D.

For Ll > Ll + 1.4 DI L, step D! It is possible to form fine grooves with no lower limit for L up to 1.4 times that of L.

FIG. 3 is an example of a CN isolation structure (a structure in which a region making contact with a collector is insulated and isolated) of a bipolar LSI according to the present invention. The deep groove 21 is deep enough to penetrate through the N0 layer 22 in order to provide isolation between elements, and the shallow groove 23 is deep enough to reach the N0 layer 22 in order to separate the region 24 forming the emitter and base from the contact region 25 of the collector. Satoru. After this further Si etching, a thermal oxide film 26 is formed and SSO is applied for planarization.

−? Fill the groove with filler 27 such as POtyst and fill it with C.
The N separation structure is completed. In this more advanced CN isolation method, a deep trench 21 for insulation isolation between elements and a shallow trench 23 for CN isolation
Since the grooves can be formed at the same time and the grooves can be made finer, higher integration of the device becomes possible. Further, since the slopes 28 and 29 are formed at the bottom of the groove, concentration of stress generated in the heat treatment process at the bottom of the groove can be alleviated.

As described above, according to the present invention, etching grooves of different depths can be simultaneously formed by forming an etching mask once, and the width of the grooves can be made fine. Furthermore, since the etching is performed separately into etching to create a step and etching to adjust the final depth, the depth of the groove can be easily controlled. Further, by using this etching, an insulating isolation structure of CN isolation can be formed finely.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view showing the etching shape depending on the crystal plane.
FIG. 2 is a cross-sectional view showing the etching process of the present invention, and FIG. 3 is a cross-sectional view showing a CN isolation structure using the present invention. l...Si substrate, 2...slanted surface, 3...groove. Agent Patent Attorney Toshiyuki Usuda 1! i 1 Figure 2 Figure (a) (口2 Toru 3 Figure 1

Claims (1)

[Claims] 1. A first step in which a plurality of grooves with different depths according to the etching width are formed in the same substrate by an etching method that leaves the (111) plane of the silicon substrate, and a second etching step in which the depth of the grooves is increased. A method for etching a silicon substrate, comprising the steps of: