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JPS5894034U - tracing device - Google Patents

tracing device

Info

Publication number
JPS5894034U
JPS5894034U JP18971281U JP18971281U JPS5894034U JP S5894034 U JPS5894034 U JP S5894034U JP 18971281 U JP18971281 U JP 18971281U JP 18971281 U JP18971281 U JP 18971281U JP S5894034 U JPS5894034 U JP S5894034U
Authority
JP
Japan
Prior art keywords
determination
tracing device
signal
response
determination signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18971281U
Other languages
Japanese (ja)
Inventor
望月　清
Original Assignee
株式会社山武
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社山武 filed Critical 株式会社山武
Priority to JP18971281U priority Critical patent/JPS5894034U/en
Publication of JPS5894034U publication Critical patent/JPS5894034U/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の実施例を示すブロック図である。 ＤＡＴ・・・・・・入力データ、ＡＤＲ・・・・・・入
力信号、ＳＪ・・・・・・判定信号、ＤＴＭ・・・・・
・データメモリ、ＪＵＭ・・・・・・判定メモリ、ＡＤ
Ｃ・・・・・・アドレスカウンタ。The figure is a block diagram showing an embodiment of the present invention. DAT...Input data, ADR...Input signal, SJ...Judgment signal, DTM...
・Data memory, JUM... Judgment memory, AD
C...Address counter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号が特定のコードとなったときに判定信号を送出
する判定メモリと、前記判定信号に応じてカウントを進
めるアドレスカウンタと、該アドレスカウンタにより書
込アドレスが指定されかつ前記判定信号に応じて前記入
力信号と対応する入力データを格納するデータメモリと
を備えたことを特徴とするトレース装置。a determination memory that sends out a determination signal when an input signal becomes a specific code; an address counter that advances the count in response to the determination signal; and a write address designated by the address counter and determined in response to the determination signal. A tracing device comprising: a data memory that stores input data corresponding to the input signal.
JP18971281U 1981-12-18 1981-12-18 tracing device Pending JPS5894034U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18971281U JPS5894034U (en) 1981-12-18 1981-12-18 tracing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18971281U JPS5894034U (en) 1981-12-18 1981-12-18 tracing device

Publications (1)

Publication Number Publication Date
JPS5894034U true JPS5894034U (en) 1983-06-25

Family

ID=30103504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18971281U Pending JPS5894034U (en) 1981-12-18 1981-12-18 tracing device

Country Status (1)

Country Link
JP (1) JPS5894034U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5687147A (en) * 1979-12-17 1981-07-15 Mitsubishi Electric Corp Data recorder
JPS56121155A (en) * 1980-02-28 1981-09-22 Toshiba Corp Address coincidence detection circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5687147A (en) * 1979-12-17 1981-07-15 Mitsubishi Electric Corp Data recorder
JPS56121155A (en) * 1980-02-28 1981-09-22 Toshiba Corp Address coincidence detection circuit

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