JPS588157B2 - Printed wiring board and its manufacturing method - Google Patents
Printed wiring board and its manufacturing methodInfo
- Publication number
- JPS588157B2 JPS588157B2 JP12966276A JP12966276A JPS588157B2 JP S588157 B2 JPS588157 B2 JP S588157B2 JP 12966276 A JP12966276 A JP 12966276A JP 12966276 A JP12966276 A JP 12966276A JP S588157 B2 JPS588157 B2 JP S588157B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating plate
- chip component
- printed wiring
- solder
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 33
- 230000004907 flux Effects 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 6
- 230000001681 protective effect Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 35
- 238000000034 method Methods 0.000 description 12
- 238000005476 soldering Methods 0.000 description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 10
- 229910052709 silver Inorganic materials 0.000 description 10
- 239000004332 silver Substances 0.000 description 10
- 229920002545 silicone oil Polymers 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 4
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 229910052573 porcelain Inorganic materials 0.000 description 2
- 239000011253 protective coating Substances 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
【発明の詳細な説明】
本発明は絶縁板の表面に形成した導電層にチップ部品の
電極を半田付けするようにした印刷配線板およびその製
造法に関するものであり、その目的とするところは前記
チップ部品の電極を前記絶縁板の表面に形成した導電層
に対して効率的に半田付けすることができ、かつそのチ
ップ部品の絶縁板への半田付け後の信頼性を高めること
にある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a printed wiring board in which electrodes of chip components are soldered to a conductive layer formed on the surface of an insulating board, and a method for manufacturing the same. It is an object of the present invention to efficiently solder the electrodes of a chip component to a conductive layer formed on the surface of the insulating plate, and to improve the reliability after the chip component is soldered to the insulating plate.
一搬に印刷配線板の絶縁板として有機系のものを使用し
た場合には半田耐熱条件は３００℃で２〜３秒、２６０
℃で５〜１０秒となっている。When an organic material is used as an insulating board for a printed wiring board, the soldering heat resistance conditions are 300°C for 2 to 3 seconds, 260°C
It takes 5 to 10 seconds at ℃.
また、印刷配線板にインダクタンス素子、キャパシタン
ス素子、レジスタンス素子等の個別部品を塔載するに際
して、そのリード線、キャップ、保護塗膜等を廃止して
前記個別部品をチップにすることが行なわれている。Furthermore, when mounting individual components such as inductance elements, capacitance elements, and resistance elements on printed wiring boards, lead wires, caps, protective coatings, etc. are eliminated, and the individual components are made into chips. There is.
そして、チップ部品を印刷配線板に実装するに際しては
、チップ部品の電極と印刷配線板の導電層とを対向させ
て電気的に接続するアツセンブリ形態が採用されている
。When a chip component is mounted on a printed wiring board, an assembly form is adopted in which the electrodes of the chip component and the conductive layer of the printed wiring board are faced and electrically connected.
ところで、印刷配線板に電気部品を接続するに際しては
溶融半田中に電気部品を定置化した印刷配線板を浸漬す
る方法が採用されているが、チップ部品を印刷配線板に
実装するに際してはチップ部品の電極に対して溶融半田
が充分にまわり込まない惧れがあるために、半田ペース
トを印刷配線板の導電層、チップ部品の電極のいづれか
に予じめ塗布しておくとか、ペースト入り半田をワツシ
ャー化して印刷配線板の導電層とチップ部品の電極間に
はさみ込む方法が採用されていた、印刷配線板に電気部
品を接続するに際してはフラットデイツプあるいはフロ
ウソルダリング等の多点を同時に半田付けするマスソル
ダリング方式を採用することがマスプロ的に重要なこと
であるが、チップ部品を印刷配線板に実装するに際して
は印刷配線板の下面にチップ部品を固定することができ
ないため、印刷配線板の土間にチップ部品を定置して高
温雰囲気、赤外線放射加熱等の加熱手段を用いてリフロ
ウ半田付け方式を採用せざるを得なかった。By the way, when connecting electrical components to a printed wiring board, a method is adopted in which the printed wiring board with fixed electrical components is immersed in molten solder. Since there is a risk that the molten solder may not wrap around the electrodes sufficiently, it is recommended to apply solder paste to either the conductive layer of the printed wiring board or the electrodes of the chip components in advance, or to use solder containing paste. The method used was to solder the solder and sandwich it between the conductive layer of the printed wiring board and the electrode of the chip component.When connecting electrical components to the printed wiring board, multiple points were simultaneously soldered using flat dip or flow soldering. It is important for mass production to adopt a mass soldering method that attaches chips to printed wiring boards. There was no choice but to adopt a reflow soldering method in which the chip components were placed on a dirt floor and a heating method such as a high-temperature atmosphere or infrared radiation heating was used.
ところが、リフロウ半田付け方式の場合には印刷配線板
の絶縁板が磁器であれば前記加熱手段に耐えるが、フェ
ノール・エポキシなどの樹脂による絶縁板では耐えるこ
とができず、導電層のはぐり、絶縁板のこげ、ふくれ、
層間はくりを起す恐れがある。However, in the case of the reflow soldering method, if the insulating board of the printed wiring board is made of porcelain, it can withstand the heating means, but if the insulating board is made of resin such as phenol or epoxy, it cannot withstand the heating method, and the conductive layer may peel off or the insulation Burnt and swollen boards,
There is a risk of interlayer peeling.
また、信頼性を確保する上の問題点としては半田付けに
使用したアツセンブリ用フラツクスがチップ部品と印刷
配線板との間に侵入して電極、導電層を腐食したり、絶
縁抵抗の低下を招く原因となる。In addition, there are problems in ensuring reliability that the assembly flux used for soldering can enter between the chip components and the printed wiring board, corroding the electrodes and conductive layers, and causing a decrease in insulation resistance. Cause.
また、半田の付着がチップ部品の端面部にまで及ぶので
半田付け部に過度に付着した半田がここの支点として働
らき、印刷配線板にしばしば負荷され、軽度の曲げ力に
よってチップ部品が印刷配線板から脱落するおそれがあ
る。In addition, since the solder adhesion extends to the end face of the chip component, the excessive solder adhering to the soldered part acts as a fulcrum here, and is often applied to the printed circuit board, causing the chip component to bend due to the slight bending force. There is a risk of it falling off the board.
また、チップ部品の銀電極が半田によりくわれて消失し
易くなる。Furthermore, the silver electrodes of the chip components are easily soldered and disappear.
さらにまた、チップ部品の多くが銀を７００℃〜８００
℃で焼き付けた電極を備えているので電極銀が印刷配線
板の他の導電部分より高電位となる場合にはチップ部分
の表面ばかりでなく、印刷配線板の絶縁面をも移行し、
汚染とか絶縁劣化の要因となるという欠点があった。Furthermore, many of the chip components are heated to 700°C to 800°C.
Since it is equipped with electrodes baked at ℃, when the electrode silver has a higher potential than other conductive parts of the printed wiring board, it transfers not only to the surface of the chip part but also to the insulating surface of the printed wiring board.
This has the drawback of causing contamination and insulation deterioration.
本発明はこのような従来の欠点を解消するものであり、
以下、本発明を実施例の図面と共に説明する。The present invention solves these conventional drawbacks,
The present invention will be described below with reference to drawings of embodiments.
実施例
まず、第１図に示すように紙基材フェノール樹脂積層板
１に所定の形状の導電層２を準備し、この絶縁板１上の
導電層２の全部、もしくは半田付けに必要な箇所以外を
マスクして第２図に示すように少くとも半田付け予定部
分のみに錫−鉛系はんだ合金で予備めっきまたは予備は
んだする公知の技術を用いてはんだ層３を形成した。Example First, as shown in FIG. 1, a conductive layer 2 of a predetermined shape is prepared on a paper-based phenolic resin laminate 1, and the entire conductive layer 2 on this insulating plate 1 or the necessary parts for soldering is prepared. As shown in FIG. 2, the solder layer 3 was formed using a known technique of pre-plating or pre-soldering with a tin-lead solder alloy only on the portions to be soldered, while masking the other parts.
次に磁器コンデンサとか抵抗器の角型チツプ５の電極部
分６が接続される部分に第２図に示すように樹脂系フラ
ツクスを印刷し乾燥してフラツクス樹脂層４を形成した
印刷できない場合には全面にローラまたはスプレイによ
りフラツクス樹脂層４をコートしてもよい。Next, as shown in FIG. 2, a resin flux is printed on the part where the electrode part 6 of the square chip 5 of the ceramic capacitor or resistor is connected and dried to form the flux resin layer 4. If printing is not possible, The entire surface may be coated with the flux resin layer 4 by roller or spraying.
チップ部品５は第３図に示すようにその電極６が接続す
べお導電層２に対応するように治具８によって押接した
り、チップ部品５と絶縁板１上の導電層２とをクロスオ
ーバー配線する場合には前もってチップ部品５あるいは
導電層２に印刷ししておいた接着材７を用いて接着する
ことにより絶縁板１の所定箇所に定置化した。As shown in FIG. 3, the chip component 5 is pressed with a jig 8 so that its electrode 6 corresponds to the conductive layer 2 to be connected, or the chip component 5 and the conductive layer 2 on the insulating plate 1 are crossed over. In the case of wiring, the chip components 5 or the conductive layer 2 were printed on the chip components 5 or the conductive layer 2 in advance and bonded using an adhesive 7 to be fixed at a predetermined location on the insulating plate 1.
ここに、チップ部品５は絶縁板１の上面あるいは下面の
いづれにおいて定置化されていてもよい。Here, the chip component 5 may be fixed on either the upper surface or the lower surface of the insulating plate 1.
次にチップ部品５が絶縁板１上に定置化された状態にお
いて第４図に示すように浴槽１１内でヒ一ター１０で２
６０°Ｃに加熱したシリコンオイル９中に５〜６秒間前
記絶縁板１のチップ部品５が定置化された片面を浸漬し
た。Next, with the chip component 5 fixed on the insulating plate 1, the chip component 5 is placed in a bathtub 11 with a heater 10 as shown in FIG.
One side of the insulating plate 1 on which the chip component 5 was fixed was immersed in silicone oil 9 heated to 60° C. for 5 to 6 seconds.
ここに、絶縁板１はその両面をシリコンオイル９中に浸
漬してもよい。Here, both sides of the insulating plate 1 may be immersed in the silicone oil 9.
このように絶縁板１にチップ部品５を定置化した状態で
シリコンオイル９中に浸漬すると、第５図に示すように
絶縁板１の導電層２上に定量付着している錫−鉛系の半
田層３が溶解し、チップ部品５の電極６を絶縁板１上の
導電層２に電気的に接続するように固定することができ
た。When the chip components 5 are fixed on the insulating plate 1 and immersed in the silicone oil 9, as shown in FIG. The solder layer 3 was melted, and the electrode 6 of the chip component 5 could be fixed so as to be electrically connected to the conductive layer 2 on the insulating plate 1.
この時、錫−鉛系の半田層３の表面に形成されているフ
ラツクス層４も溶解するのでチップ部品５の電極６の面
に存在する酸化物に作用してはんだの拡がり易い面を形
成する。At this time, the flux layer 4 formed on the surface of the tin-lead solder layer 3 is also dissolved, so it acts on the oxide present on the surface of the electrode 6 of the chip component 5, forming a surface on which the solder can easily spread. .
そして前記の半田層３によるチップ部品５の電極６と絶
縁板１の導電層２との間には金属間化合物層１２を形成
した。Then, an intermetallic compound layer 12 was formed between the electrode 6 of the chip component 5 made of the solder layer 3 and the conductive layer 2 of the insulating plate 1.
一方、はんだの熔解に使用したシリコンオイル９の１部
は、絶縁板１の絶縁面やチップ部品５の絶縁面を含めた
面をはんだ加熱により焼き付けられた形でおおうように
表面保護膜１３として作用する。On the other hand, a part of the silicone oil 9 used for melting the solder is used as a surface protective film 13 so as to cover the surfaces including the insulating surface of the insulating plate 1 and the insulating surface of the chip component 5 in a baked form by heating the solder. act.
このようにチップ部品５の電極６と絶縁板１のチップ部
品接続用導電層２部分との間に限定して半田付け部分を
形成すると、はんだの純度とか付着量が一定化するから
半田付けによるチップ部品５の接続の品質が均一化でき
、チップ部品５の端面へのはんだ付着が少なくなり、絶
縁板１の曲げ負荷によるチップ部品５の脱落が解消でき
る。If the soldering part is limited between the electrode 6 of the chip component 5 and the part of the conductive layer 2 for connecting the chip component of the insulating plate 1 in this way, the purity of the solder and the amount of adhesion will be constant, so the soldering The quality of the connections of the chip components 5 can be made uniform, the amount of solder adhering to the end faces of the chip components 5 is reduced, and the possibility of the chip components 5 falling off due to the bending load of the insulating plate 1 can be eliminated.
また、半田デイツプ法にくらべて半田の使用量が少なく
経済的となる。Furthermore, compared to the solder dip method, the amount of solder used is smaller and it is more economical.
さらにまた、チップ部品５の実装をおこなうとき、フラ
ツクスとか半田の供給をする時間がなくなり、フラツク
ス、はんだの比重とか純度管理も不必要となり、電子機
器の組立が著じるしく簡略化できる。Furthermore, when mounting the chip component 5, there is no time to supply flux or solder, and there is no need to manage the specific gravity or purity of flux or solder, and the assembly of electronic equipment can be significantly simplified.
一方、チップ部品５の銀電極に対しては銀電極のはんだ
によるくわれ量が一定となるのでそのチップ部品５の半
田による接続の信頼性が向上し、印刷配線板のオイル浴
後に残溜するシリコンオイルは、洗浄除去することなく
、印刷導電層間、印刷導電層とチップ部品の銀電極間、
チップ部品の電極間において吸湿性、水分の吸着性を防
げ電圧印加によるチップ部品の銀電極のマイグレイショ
ンを大幅に抑制することができ、チップ部品の実装後の
印刷配線板への保護コーティングの省略を可能とするな
ど信頼性向上の面でも著じるしい効果を有する。On the other hand, since the amount of solder soldering of the silver electrode to the silver electrode of the chip component 5 is constant, the reliability of the solder connection of the chip component 5 is improved, and no residue remains after the printed wiring board is bathed in oil. Silicone oil can be used between printed conductive layers, between printed conductive layers and silver electrodes of chip components, without washing and removing.
Prevents hygroscopicity and adsorption of water between the electrodes of chip components, greatly suppresses migration of the silver electrodes of chip components due to voltage application, and eliminates the need for protective coating on printed wiring boards after chip components are mounted. It also has a significant effect in improving reliability, such as by making it possible to
尚、ＰＰ−７級の印刷配線板を使用し、その表面に形成
した厚さ３５μの銅箔に厚さ１０μの錫−鉛系の半田層
を設けると共に極を薄くフラツクス層を設け、前記鋼箔
に対して４×８ｍｍで静電容量１００ＰＦのチタン磁器
よりなるチップコンデンサの両端２ｍｍ幅に形成した銀
電極を対向させ、前記チップコンデンサを前記印刷配線
板に定置化した状態で高温オイル中に浸漬し、前記印刷
配線板上の錫一鉛系、半田層とフラツクス層を利用して
前記チップコンデンサの銀電極と前記印刷配線板の銅箔
間に金属間化物層を形成して両者を接合した。A PP-7 grade printed wiring board was used, and a 10 μm thick tin-lead solder layer was provided on a 35 μm thick copper foil formed on the surface of the printed wiring board, and a thin flux layer was also provided on the surface of the above-mentioned steel. Silver electrodes formed to a width of 2 mm at both ends of a chip capacitor made of titanium porcelain with a size of 4 x 8 mm and a capacitance of 100 PF were opposed to the foil, and the chip capacitor was placed on the printed wiring board and placed in hot oil. immersion, and form an intermetallic layer between the silver electrode of the chip capacitor and the copper foil of the printed wiring board using the tin-lead based, solder layer and flux layer on the printed wiring board to bond them together. did.
この時、チップコンデンサの接着強度は銅箔の面積３ｍ
ｍ当り８．２ｋｇであり、１０回の曲げに耐え、かつ銀
の移行はシリコンオイルがない場合には直流１００■印
加で１１５〜２３０時間であったが１８２０〜２２３０
時間に延長された。At this time, the adhesive strength of the chip capacitor is 3m in area of the copper foil.
The weight was 8.2 kg per m, it withstood 10 bends, and the silver migration was 1820-2230 hours, whereas it was 115-230 hours with 100 μ DC applied in the absence of silicone oil.
extended in time.
以上のように本発明によれば、チップ部品及び絶縁板の
表面にオイルが表面保護膜として形成されるので、チッ
プ部品の電極が銀等のものであってもその移行を充分に
抑圧することができ、半田によるチップ部品の接続状態
の信頼性を高めることができる。As described above, according to the present invention, oil is formed as a surface protective film on the surfaces of chip components and insulating plates, so even if the electrodes of chip components are made of silver or the like, oil migration can be sufficiently suppressed. This makes it possible to improve the reliability of the connection state of chip components using solder.
また、半田付けに際しては予じめ絶縁板上の導電層に設
けたものを使用し、これを加熱したオイル中で溶解する
ので、半田純度等の工程管理がしやすく、しかも多点を
同時に接続するにも通しているなど、その工業的利用価
値は極めて大なるものである。In addition, when soldering, a conductive layer on an insulating board is used in advance, and this is dissolved in heated oil, making it easy to control the process such as solder purity, and connecting multiple points at the same time. Its industrial value is extremely great, as it can even be used for various purposes.
第１図、第２図、第３図及び第４図は本発明の印刷配線
板の製造法を説明するための図、第５図は同方法により
得た印刷配線板の要部断面図である。
１・・・・・・絶縁板、２・・・・・・導電層、３・・
・・・・半田層、４・・・・・・フラツクス層、５・・
・・・・チップ部品、６・・・・・・電極、７・・・・
・・接着剤、８・・・・・・治具、９・・・・・・加熱
したオイル、１３・・・・・・表面保護膜。Figures 1, 2, 3, and 4 are diagrams for explaining the method of manufacturing a printed wiring board of the present invention, and Figure 5 is a cross-sectional view of the main parts of a printed wiring board obtained by the same method. be. 1... Insulating plate, 2... Conductive layer, 3...
...Solder layer, 4...Flux layer, 5...
...Chip parts, 6...Electrode, 7...
...Adhesive, 8...Jig, 9...Heated oil, 13...Surface protective film.
Claims (1)
を対向せしめて半田付けし、前記絶縁板および前記チッ
プ部品の表面をオイルでなる表面保護膜で被覆している
印刷配線板。 ２ 絶縁板の表面に形成した導電層のチップ部品の電極
が対向される部分に予じめ半田層を形成したのちにフラ
ツクス層を塗布し、前記絶縁板に形成した導電層に前記
チップ部品の電極が対向するように前記絶縁板に対して
前記チップ部品を定置させた状態で前記絶縁板を加熱さ
れたオイル中に浸漬することにより、前記半田層及びフ
ラツクス層を溶解して前記チップ部品を前記絶縁板上の
導電層に電気的に接続するように固定し、かつ前記絶縁
板および前記チップ部品の表面に前記加熱媒体として使
用したオイルを表面保護膜として被覆することを特徴と
する印刷配線板の製造法。[Claims] 1. Electrodes of a chip component are soldered to a conductive layer formed on the surface of an insulating plate so as to face each other, and the surfaces of the insulating plate and the chip component are coated with a surface protective film made of oil. Printed wiring board. 2. After forming a solder layer in advance on the part of the conductive layer formed on the surface of the insulating plate that faces the electrodes of the chip component, a flux layer is applied, and the conductive layer formed on the insulating plate is coated with the solder layer of the chip component. By immersing the insulating plate in heated oil with the chip component placed against the insulating plate so that the electrodes face each other, the solder layer and the flux layer are melted and the chip component is removed. The printed wiring is fixed so as to be electrically connected to the conductive layer on the insulating plate, and the surfaces of the insulating plate and the chip component are coated with oil used as the heating medium as a surface protective film. Method of manufacturing boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12966276A JPS588157B2 (en) | 1976-10-27 | 1976-10-27 | Printed wiring board and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12966276A JPS588157B2 (en) | 1976-10-27 | 1976-10-27 | Printed wiring board and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5353773A JPS5353773A (en) | 1978-05-16 |
| JPS588157B2 true JPS588157B2 (en) | 1983-02-14 |
Family
ID=15015037
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12966276A Expired JPS588157B2 (en) | 1976-10-27 | 1976-10-27 | Printed wiring board and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS588157B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60113109A (en) * | 1983-11-25 | 1985-06-19 | Matsushita Electric Works Ltd | Rotary encoder |
| JPH0345061U (en) * | 1989-09-06 | 1991-04-25 |
-
1976
- 1976-10-27 JP JP12966276A patent/JPS588157B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60113109A (en) * | 1983-11-25 | 1985-06-19 | Matsushita Electric Works Ltd | Rotary encoder |
| JPH0345061U (en) * | 1989-09-06 | 1991-04-25 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5353773A (en) | 1978-05-16 |
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