JPS5860367A - Multiprocessor system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data exchange method for a multiprocessor system, and more particularly to a method for coupling a plurality of O processors each having a 1CVX memory and a communication memory.

Conventionally, data exchange methods between processors in a multi-7u*y system include (x) one-to-one coupling method, (
2) bus coupling method and (3) shared memory method are adopted.

However, method (1) has the disadvantage that the number of coupling devices increases rapidly as the number of processors increases, while methods (2) and (3) do not have this problem. If the amount of data to be exchanged increases, there will be a large number of competitions for access to the path from the server or the shared memory for each 1a-, resulting in a disadvantage in that the processing capacity of the system will be reduced.

The present invention divides a plurality of processors, each having a local memory and a communication memory, into several groups, and allows each group to exchange communication memory data at high speed, thereby providing a four-domain transfer function. A data transfer control device (DTC) equipped with
Add another communication memory to the other group's D
By connecting to the TC and configuring it to exchange data between groups via its communication memory, the above drawbacks can be solved, without sacrificing the features of the conventional coupling method.
The purpose of the present invention is to provide a hardware architecture that enables an optimal system configuration that minimizes the memory capacity and transfer time required for data transfer, and that can be easily implemented.

Embodiments of the present invention will be described in detail below with reference to the drawings.

! In the Ruchipu Yoiryu Tsusa system, data exchange between processors is necessary, and several methods have been devised in order to exchange data with the processors when and in the required amount. In the system according to the present invention, a communication memory for data exchange is separately designed for each grosser, and a special data transfer control device (DTC) K is used to perform data transfer between the communication memories using p-doctor cast transfer. It is possible to speed up data transfer and increase the processing efficiency of the processor. and 0DTC are each processor P, as shown in FIG.
1*P*s...The data written by P to the communication memory CM, CM,...5 CM connected to itself is transferred to other memory cards a-k, Indicates that it is connected to. According to this method, access from the four processors to the communication memory is inhibited only when data is being copied between the communication memories, so each processor frequently accesses the communication memory. However, the processing efficiency of each processor does not deteriorate.

Even so, access is slightly hindered during data transfer between communication memories, so it is desirable that this time be as short as possible. If you try to access the communication memory from the DTC using timing, the time will be limited by the slow cycle of the customer processor. Therefore, the communication memory required for each processor will be difficult. It is also possible to use a much faster memory and take advantage of its high speed to copy data between communication memories, reducing the processing time and bringing the processing efficiency of each processor closer to its maximum.

However, if a large number of processors were combined using only this method, the capacity of communication messages would increase, and the time required for data exchange would also increase, so the system according to the present invention solves these problems. In order to do this, the processors are further divided into several groups, for example, by grouping the control objects to reduce the amount of data exchange between groups 1, or by dividing the processors into groups according to the required processing speed, such as high speed, medium speed, low speed, etc. By dividing the data into groups and minimizing the frequency of data exchange within each group, it is possible to create a group configuration that is optimal for the target system.

The combination of groups is 1 as shown in Figure 2.
Two communication memories/are connected to one 112 setuna,
One is coupled to the other group's DTC, and the other is coupled to its own group 0DTC.

Using these two communication memories, #! As shown in Figure 3, the data that needs to be exchanged between groups is
Data can be exchanged between di-groups by exchanging data using the M'ky f pdalam process.

That is, in Fig. 3, P2.l is the first group and the second group.
6 CM to perform the following processing for group data exchange
Of the data in the Pl-1 to P1-mushroom occurrence data area of z*@, the data necessary for the second group is set to CM, PI of l.
@1 Store in part of the generated data area. Of the data of CM, .1, those necessary for the first group are stored in the P, .1 generated data area of CMj-. In addition, the generated data of the second group can be accessed from the CMOPg-1 generated data area of each processor of the first group, and the generated data of each processor of the second group can be accessed. can access the first group of generated data included in the PI@1 generated data area of each CM.

By arranging the connections of these groups in a star shape, ring shape, grid shape, or a combination of these, it is possible to configure a system with a degree of freedom, allowing for an optimal configuration tailored to the desired system! A simple set GST stem can be realized. DTC
Data transfer by K for communication is done by 1 member in the group.
Figure 4 shows a multiple processor system in which three groups are connected in a ring as an embodiment of the present invention. shows.

Each group has N processors (CP), and each processor has a communication memory (CM) and a logical memory (CP).
LM) are combined. The communication memory is further coupled to a data transfer control device (D, TC) for each group, and data exchange between processors within the group is performed by broadcast data transfer between 0M and 0M performed by this DTC. Taking the first group as an example, CM 1 *
Data is exchanged between the PRESSENERS within the group between @ and CMt-w, so Tori,]! tcD'Pcx includes communication memory CMl for data exchange with the second group.
・The contents of CM1*@ are used as group 1 and group 20 exchange data. Similarly, the second group and the third group are sent via CM,
The third group and the first group exchange data between each group via CM1, .

The feature of this group configuration is that when applied to a real-time control system, the processing speed of each group can be set to high, medium, or
By dividing the speed into low-speed sections, it is possible to configure an efficient system as a whole. Also, if the processing content of each group is the same, a multiplexed configuration can be used to increase system reliability. As an example, we combined many groups into a hawk shape and a lattice shape! This shows a multi-processor system, and the only difference from the first embodiment is the connection shape between the groups, and data exchange between each two groups is performed in the same way as in the first embodiment. , In addition to these embodiments, it is easy to see that various system configurations combining these inter-group connection shapes are possible.0 As explained above, according to the multiprocessor configuration of the present invention, data transfer is possible. The basic configuration consists of a control device, communication memory, and processor (including local memory), and by combining these basic configurations, it is possible to easily realize the optimal configuration for the target system.In addition, the number of processors in each group can be adjusted. However, as a whole system, a system configuration that minimizes the amount of data transfer and the data transfer time can be easily realized, and the system can be easily expanded by simply connecting memory for communication between groups.

Furthermore, by having several groups have the same program,
By viewing these multiple groups as a multiplexed system, an extremely reliable system configuration can be easily realized.In addition, especially in the case of a ring-like connection, the data transfer direction between the groups can be taken in two directions, which increases system reliability. If the data transfer controller and communication memory can be integrated, and the processor and local memory can be modularized, so-called LRU (Lin・R@placeable@Unit) can be achieved.
) Configurability, maintenance, and troubleshooting are easy.

Furthermore, except for the data transfer control device, general-purpose microcomputer sets and memory cards can be used, and Kusudou W production is popular.

[Brief explanation of drawings]

FIG. 1 is a diagram for explaining the processing of the data transfer control device used in the present invention, FIG. 2 is a basic configuration diagram of inter-group coupling in the present invention, and FIG. Diagram to explain how to exchange data between groups,
@Figures 4 to 6 are block diagrams showing embodiments of the present invention. DTC... Data transfer control device, CM...
・・Communication memory, P・・・・Pro Ryutsusa, LM・
...Local memory. 81 Figure 4

Claims (3)

[Claims] (1) Data exchange between multiple processors, each having a local memory for storing programs and data used by itself and a communication memory for exchanging data with other processors, is A multiprocessor system 0 characterized in that the data transfer is performed through a data transfer control device connected to a memory for use in the computer and having high-speed data exchange and broadcast transfer functions. (2) A plurality of processors each having a local memory for storing programs and data used by itself and a first communication memory for exchanging data with other processors are divided into a plurality of groups, Data exchange within each group is performed via a data transfer control device connected to the communication network and equipped with high-speed data exchange and broadcast transfer functions, and at least one data transfer control device is connected to the processor of each group. a second communication memory connected to the data transfer control device for coupling between groups, and data exchange between the groups is performed via the second communication memory. 'ysu system. (3) A multiprocessor system according to claim (2), characterized in that the connection between the Goo-1s is in the form of a hawk, a ring, a lattice, or a combination thereof.