JPS5856327A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent excess annealing of a lower layer LSI when the impurity regions are to be formed in the respective layers of a multilayer LSI of semiconductor device by a method wherein after impurities are introduced respectively in the respective layers, the heat treatment for activation is performed. CONSTITUTION:An insulating layer 2 is formed on a single crystal substrate 1, and a single crystal polysilicon layer is formed on the upper face thereof. Then impurity diffusion and gate oxidation are performed to the single crystal silicon layer thereof to form the first layer LSI (arrow markI). The same process is repeated thereafter to form the second layer LSI, th third layer LSI (arrow marks II, III). After the LSI's of the whole layers are completed, the heat treatment is performed to activate impurities introduced in the respective layers. Because annealing for activation of impurities is performed finally in the lump at the stage when the whole layers are completed, not performing at every layer by this way, excess annealing of the lower layer LSI can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, a method of manufacturing a three-dimensional multilayer L@l IF), and more particularly a method of manufacturing an impurity ion implantation layer.

LJII (Layg@glea1@Int@grat
As a construction technology for @d eir * ult), multilayering is being attempted to increase the degree of integration.

One of the future targets for &C is a device with a super-density density of 16 Mbits per chip, in which case 8
A multi-layered structure called ~IO layer must be put into practical use.For such three-dimensional Li1I t) Manufacturing 11C'a, the conventional L81 fabrication technology was applied as is, which caused various inconveniences in life engineering. In many cases.

For example, if thermal processes such as annealing and gate oxidation are performed to activate the impurity ion-implanted layer after each layer is formed,
Lower layer (first layer created) LJII has a large thermal history (
over-diffusion of the diffusion layer (depth and lateral extent)
This can lead to negative effects such as a decrease in the number of carriers. In particular, when it comes to impurity doping, ion implantation is the method that is the mainstream in three-dimensional LglF) manufacturing because it is easy to control the doping once and the depth, and is suitable for increasing the degree of integration. Therefore, annealing for making the ion-implanted layer hostal is a necessary and indispensable thermal process, and the occurrence of the above-mentioned problems accompanying this is unavoidable, and it is necessary to believe in this countermeasure.

The purpose of the present invention is 1. to establish a manufacturing method that minimizes the thermal influence in the thermal process when creating a multilayer LSI; A method for manufacturing a semiconductor device in which an impurity region is formed, wherein after impurities are introduced into each of the plurality of layers, the introduced impurities are also subjected to heat treatment for activation. provide a method.

Hereinafter, embodiments of the present invention will be described for M(Nil, all).

Regarding a method for manufacturing a multilayer LSI, the applicant of the present application has realized, for example, a method shown in the accompanying drawings. In this method,
First, a 4a edge layer (1110 m
) 2 is provided, a semiconductor substrate is produced on the scribe line 4, a polysilicon layer is deposited on the entire surface, and the polysilicon layer is then single-crystalized using the exposed substrate as a nucleus by irradiation with energy.

Impurity diffusion and gate oxidation are performed on the single crystal thin layer thus formed to form an 81-layer semiconductor device (IJI) (summer arrow). After that, a polysilicon layer is deposited again, and the polysilicon layer is made into a single crystal by using the risk line as a core by energy irradiation.Then, the above steps are repeated to form a 4z layer LSI (■ arrow). , in the attached figure.

5 is a single-crystal silicon layer, V is a poly 7921 layer, the third layer (arrow ■) is just being made into a single crystal, 6 is an oxide film, and 7 is a phosphorus layer. As mentioned above, a multilayer LBI is created by stacking the first layer, second layer, etc.
If the ion-implanted layer is annealed for each layer, the lower layer will be unnecessarily subjected to the high-temperature thermal process, which may cause the formed diffusion layer to become over-diffused or the carrier concentration to decrease. Otherwise, the desired performance may not be obtained.

In this qi4, the process up to the impurity ion implantation performed during the drawing process of the multilayer LSI is carried out in the normal process, and the 7-layer process for activating the ion-implanted layer is performed in the next process. Instead, when all the layers are completed, the entire WkVC is heat-treated in a normal furnace at 1050 °C for 30 minutes (for example, in an inert gas atmosphere at 1050 °C for 30 minutes). In the same way, the volume of low-temperature water (72 ml) for stabilizing the field is also carried out all at once at the final stage. By such a method, the overmold of the lower layer Lliil is
7-annealing can be prevented, carrier reduction can be avoided even once, and furthermore, the same annealing can be repeated for each layer.
It is possible to omit the return process and time, allowing for efficient three-dimensional LBI shaving.

Regarding the formation of the oxide film, it is also possible to employ a manufacturing method that reduces thermal effects by employing, for example, high-pressure saponification treatment Il.

[Brief explanation of the drawing]

The accompanying drawings show a multilayer L in the process of carrying out the method of the invention.
FIG. 2 is an M-plane view showing a main part of an example of SI. 1... Single crystal silicon substrate, 2... Insulating layer. 3...Interlayer insulating film, 4...Scripe line-5.
・・Single crystal silicon layer, ・−polysilicon layer, 6・−
Gate oxide film, 7...Gate electrode, I...First layer conductor device, ■...Second layer conductor device. in-...Third layer semiconductor device

Claims (1)

[Claims] In a method of manufacturing a semiconductor device in which impurity regions are formed in multiple layers of multilayered semiconductor layers, after impurities are added to each of the multiple layers, heat treatment is performed to activate the introduced impurities. A method for manufacturing a semiconductor device, characterized by: