JPS5854412A - Voltage regulator for electric power supply - Google Patents
Voltage regulator for electric power supplyInfo
- Publication number
- JPS5854412A JPS5854412A JP15219081A JP15219081A JPS5854412A JP S5854412 A JPS5854412 A JP S5854412A JP 15219081 A JP15219081 A JP 15219081A JP 15219081 A JP15219081 A JP 15219081A JP S5854412 A JPS5854412 A JP S5854412A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- adjustment resistor
- power supply
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000009924 canning Methods 0.000 description 1
- 235000009508 confectionery Nutrition 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is DC characterised by reference voltage circuitry, e.g. soft start, remote shutdown
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明けｄｉ′ｌＩｉ！装置の出力磁圧を・４整するイ
モ調整装置に係り、特に該電源装置のＩＵ路定数のバラ
ツキに関係なく、希望の調ｅ範囲に出力−圧を調整する
に好適な出力戒圧調整装置に関する。第１図は一般的な
閉ループ制御方式のボ直圧イ源装置を示し、ここで、ｌ
け＃ｌＩ伽回路、２け誤差増幅器、３〜６Ｊｒｉ抵抗、
７け入力゛成田、８け出力電圧、９け標準電圧、１０け
４ｓ−圧、１１は検出ｄ圧であり。１疋来、第１図に示
す碌な閉ループ梱１卸り式の定厄圧厩伸装置において、
外部に新たに直ＪＪＩＩ した調整抵抗により、出力−
圧８を調整するためには第２１Δの様に誤差増幅器２に
印加される基準電圧１０ｖｃ調整砥抗１２を入れるか、
第３１図の鎌に検出電圧１１に調整抵抗１２を入れる方
式がとられていた。しかしながら第３１／１の方式は閉
ループ内に変数が入るため、位相及びゲイン特性が変わ
ること、史に距購をもって調整抵抗１２をつけた場合に
雑音が守１ループに入力され特性が乱される等の欠点が
あった。又第２−の方式は第３図の方式の欠点は改善で
きるが１部品のバラツキにより調整抵抗１２の設定点が
ずれ希望の調整範囲内に出力電圧８を→均整できない、
及び公称用カイ圧を調整抵抗の中心に設定できないとい
う欠点があった。汐ＩＩえば標準電圧９をｖｋとし分割
抵抗３，４を各々Ｈ，１，Ｉ（２とすれば、外部調整抵
抗１２がなけわば基準−圧１０ＶＲは
Ｖａ−（１１１／（Ｉ（，１＋１（，２）ｌＸＶＫ−−
・ｆｌｌとなり、出力電圧Ｖｏは
Ｖｏ ＝Ｖａ Ｘ （（Ｒ，３＋Ｒ，４） ／ Ｒ，３
） −−４２）となる。部品の初期価バラツキに
よりＶｏが希望麺に来ない場合はＲ，１又はＲ，２等を
可変抵抗器にして調整できるため問題ないが、試験等の
ために外部遠隔操作を目的に外部調整抵抗１２を実装す
るとその分割抵抗値をＲ，５，１（，６とすれば、Ｖｉ
は
偶＝（ｉｔｔ凋、５／（ｆ’ｌ、１／／Ｒ，５＋Ｒ，２
／ Ｒ，６） ）Ｘ Ｖ Ｋ ・・・・・・・・
・（３）となり、出力゛紙圧Ｖｏは
Ｖｏ ＝ｖａ Ｘ （（Ｒ，３＋Ｒ，４’） ／ Ｈ３
） ・−−（４１となる。外部調整抵抗１２ （Ｒ
，５＋１１．６ ）が精密であッテも１４．１ 、 Ｒ
，２、Ｒ，３、Ｉ？、４ 、 ＶＫｌ）：ハラツキをも
てば、出力電圧８を外部調整抵抗１２がない場合と同一
にするためにはＲ，５とＲ，６の比はバラツキをもつこ
とになり、従って外部ｆｌＮｆ、砥抗１２の中心点に端
子１４を調整しておいても外部調整抵抗１２を接続する
ことにより出カゼ圧８は大きくかわることになる。又外
部調整抵抗１２により出力電圧８を壇？威したい場合、
中心点が大巾にずれているため希望の増減耗囲に出力電
圧を変化できないという欠点があった。[Detailed Description of the Invention] The present invention kedi'lIi! This is an output pressure adjustment device that adjusts the output magnetic pressure of a device, and is particularly suitable for adjusting the output pressure to a desired adjustment range regardless of variations in the IU path constant of the power supply device. Regarding. Figure 1 shows a general closed-loop control type direct pressure source device, where l
#1I circuit, 2-digit error amplifier, 3 to 6 Jri resistors,
7 digits are input 'Narita', 8 digits are output voltage, 9 are standard voltage, 10 are 4s-voltage, and 11 is detected d pressure. 1. Since then, in the sophisticated closed-loop bale single-release type stable pressure stretching device shown in Fig. 1,
A new external adjustment resistor allows the output to be
In order to adjust the pressure 8, either insert a reference voltage 10vc adjustment grinder 12 applied to the error amplifier 2 as in the 21st Δ, or
A method was used in which an adjustment resistor 12 was added to the detection voltage 11 in the sickle shown in FIG. However, in the 31st/1st method, variables are included in the closed loop, so the phase and gain characteristics change, and if the adjustment resistor 12 is added with a certain amount of time, noise will be input to the control loop and the characteristics will be disturbed. There were other drawbacks. The second method can improve the drawbacks of the method shown in FIG. 3, but due to variations in one component, the set point of the adjustment resistor 12 deviates, making it impossible to balance the output voltage 8 within the desired adjustment range.
Another disadvantage is that the nominal chi pressure cannot be set at the center of the adjustment resistance. For example, if the standard voltage 9 is vk and the dividing resistors 3 and 4 are H, 1, and I(2), the reference voltage 10VR without the external adjustment resistor 12 is Va-(111/(I(, 1+1 (,2)lXVK--
・The output voltage Vo is Vo = Va X ((R, 3 + R, 4) / R, 3
) --42). If Vo does not reach the desired level due to variations in the initial prices of parts, there is no problem because you can adjust R, 1 or R, 2, etc. with a variable resistor, but for the purpose of external remote control for testing etc., an external adjustment resistor is used. If 12 is implemented, the dividing resistance value is R,5,1(,6, then Vi
is even = (itt decrease, 5/(f'l, 1//R, 5+R, 2
/ R, 6) )X V K ・・・・・・・・・
・(3), and the output paper pressure Vo is Vo = va X ((R, 3 + R, 4') / H3
) ・--(41. External adjustment resistor 12 (R
, 5 + 11.6) is accurate and Atte is also 14.1, R
,2,R,3,I? , 4, VKl): If there are variations, in order to make the output voltage 8 the same as when there is no external adjustment resistor 12, the ratio of R,5 and R,6 will have variations, and therefore the external flNf Even if the terminal 14 is adjusted to the center point of the grinding wheel 12, the output pressure 8 will change greatly by connecting the external adjustment resistor 12. Also, the output voltage 8 is adjusted by the external adjustment resistor 12? If you want to be intimidating,
The drawback is that the output voltage cannot be varied within the desired increase/decrease range because the center point is far off.
本発明の目的は、外部調整抵抗を接続した場合、外部調
整抵抗の位置（分割比）に関係なく、出力電圧を変化さ
せることなく、希望の増減範囲まで出力電圧を可変調整
できる出力電圧調整装置を提供するにある。An object of the present invention is to provide an output voltage adjustment device that can variably adjust the output voltage to a desired increase/decrease range without changing the output voltage, regardless of the position (division ratio) of the external adjustment resistor when an external adjustment resistor is connected. is to provide.
本発明の特徴は、外部調整抵抗を接続する前に該基糸電
圧ＶＲのイ１自を検出し、外部調整抵抗に印加される電
圧を調整することにより外部調整抵抗の分割電圧を基ａ
ｔ圧ｖＲと同一にした後、接続する様にしていることで
ある。この為、本発明によれば外部調整抵抗の接続によ
る出力電圧の変化はなくなり、外部調整抵抗の初期設定
点は常にゼ源装置自身の出力′電圧になる。The feature of the present invention is to detect the base thread voltage VR before connecting the external adjustment resistor, and adjust the voltage applied to the external adjustment resistor to adjust the divided voltage of the external adjustment resistor to the base a.
The connection is made after the t-pressure is made equal to vR. Therefore, according to the present invention, there is no change in the output voltage due to the connection of the external adjustment resistor, and the initial setting point of the external adjustment resistor is always the output voltage of the power source itself.
第４図は本発明の一実確−１を示したものである。FIG. 4 shows one embodiment of the present invention.
電源装置１３の４準慰圧ＶＲは本究明による出力電圧調
整装置３０の端子１４に入力されており。The 4 quasi-comfort voltage VR of the power supply device 13 is input to the terminal 14 of the output voltage adjustment device 30 according to the present investigation.
その電圧ＶＲは外部調整抵抗１２が電圧■を分割したぼ
圧ｖ／Ｒと比較器１５により比較されており。The voltage VR is compared by a comparator 15 with the voltage v/R obtained by dividing the voltage (2) by an external adjustment resistor 12.
比軟器１５の出力はラッチ回路１６を介し１発振器１８
の出力パルスとゲート１７によりＮ Ａ Ｎ Ｄ論理が
とられている。ゲート１７の出力は２鴫カウ／り２１に
入力され、２進カウンタ２１の出力はデジタル−アナロ
グ変換回路（以下Ｄ／Ａ変換器と称す）２０に入力され
、Ｄ／Ａ変侯器２０の出力２３はｄ圧Ｖとして出力され
ている。ラッチ回路１６は比咬器１５の出力に応じ、そ
の出力をラッチする回特であり、スイッチ２２のオン、
オフ制御も行う。リセット回路１９はカウンタ２１及び
ラッチ回路１６のリセットを行う。The output of the ratio softener 15 is passed through the latch circuit 16 to the 1 oscillator 18.
A NAND logic is established by the output pulse of the gate 17 and the gate 17. The output of the gate 17 is input to the binary counter 21, and the output of the binary counter 21 is input to the digital-to-analog conversion circuit (hereinafter referred to as a D/A converter) 20. The output 23 is output as d pressure V. The latch circuit 16 is a circuit that latches the output according to the output of the interdigitator 15, and when the switch 22 is turned on,
It also performs off control. The reset circuit 19 resets the counter 21 and the latch circuit 16.
本実施例の出力電圧ｑ４軽装置３０が電源装置１３に接
続される前にはリセット回路１９が鋤き２進カウンタ２
１及びラッチ回路１６はりセットされ。Before the output voltage q4 light device 30 of this embodiment is connected to the power supply device 13, the reset circuit 19 plows the binary counter 2.
1 and latch circuit 16 are set.
スイッチ２２はオフとなっており、電圧２３は充分高い
イ偵になっている。電源装置１３に接続され。The switch 22 is off, and the voltage 23 is sufficiently high. It is connected to the power supply device 13.
ＶＲＩＯが印加されるとリセット回路１９は動作を解除
され。■Ｒは比較 器１５において■；と比較され。When VRIO is applied, the reset circuit 19 is deactivated. ■R is compared with ■; in comparator 15.
ｖｉ＜ｖＷの間、比較器１５の出力を°’Ｈ″にし。While vi<vW, the output of the comparator 15 is set to °'H''.
発振器１８の出力パルスをゲート１７を介して２域カウ
ンタ２１に与える。２進カウンタ２１はこのパルスをカ
ラ／１・し、そのイーを２進飴で出力し、Ｄ／ＡＸ換器
２０にてアナログ１−に変函し、電圧２３を徐々に低下
させる。御所２３がＦす。The output pulse of the oscillator 18 is applied to the two-band counter 21 via the gate 17. The binary counter 21 converts this pulse to /1, outputs the E as a binary candy, converts it into an analog 1- in the D/AX converter 20, and gradually lowers the voltage 23. Gosho 23 is F.
ＶＷ＜Ｖｉとなると比較器１５の出力は”Ｌ ＩＩにな
りラッチ回路１６はこれをクソテしカウンタ２１による
カウントはとまるつこのため電圧２３はホールドされＶ
Ｂ ’ ：Ｖａとなり、スイッチ２２がオンされる。本
実肩ＶＩ１１によればＶ ’ｎ ”：＝ Ｖ Ｒのため
セ・像装置の出力電圧Ｖ。は変化することがない。この
動作のあと外部調整抵抗１２の分割比をかえることによ
り出力電圧Ｖｏを任意に変化させることができる。予じ
め外部調整抵抗１２０分割位：Ｗを中心点にしてｈ＜か
、接続後、外部調整抵抗１２のｎ７ 償を中心点にし７
てリセット回路１９を１度、−作させれば出力電圧の中
心倫に外部調整抵抗１２の中心仙を対応させることがで
きる。When VW<Vi, the output of the comparator 15 becomes "L II", the latch circuit 16 outputs this, and the counter 21 stops counting. Therefore, the voltage 23 is held and V
B': Va, and the switch 22 is turned on. According to VI11, the output voltage V of the imager does not change because V 'n'':= VR. After this operation, the output voltage can be changed by changing the division ratio of the external adjustment resistor 12. Vo can be changed arbitrarily.In advance, set the external adjustment resistor 120 division: W as the center point and h< or after connecting, set the n7 compensation of the external adjustment resistor 12 as the center point and set it as 7.
By turning on the reset circuit 19 once, the center point of the external adjustment resistor 12 can be made to correspond to the center point of the output voltage.
このように本究明によれば電源装置の部品のバラツキに
関係なく、電酋装鎧の出力電圧を外部調整抵抗のＭ効範
囲を効率よく、史って、調整することができ、外部調整
抵抗の甜続峙の出力重圧の変化音なくすことができる。According to this research, the output voltage of the electric armor can be adjusted efficiently by adjusting the M effective range of the external adjustment resistor, regardless of variations in the parts of the power supply device. It is possible to eliminate the sound of changes in the output pressure of continuation.
また、部品のバラツキに関係ないということは、−・原
ｖｃ随の部品に高価な高楯度のものを使う必要がないと
いうことであり。Also, the fact that it is not affected by variations in parts means that there is no need to use expensive, high-grade parts for the original VC.
鉦源装酋のコスト低減にも効果がある。It is also effective in reducing the cost of Gonggen Souchi.
５１ｉｉ’ｌｌＫは一般的な閉ループ制御方式の定シ圧
電源装置、４２Ｕは、基単醒庄測に調整抵抗を入れた従
来の閉ループ制御方式の定電圧電源装憾、第３図は検出
電圧側に調整抵抗を入れた従来の閉ループ制御方式の定
醸圧電源装置、第４図は定鉦圧電［株］装置に本発明を
適用した一実弛例１＃４成図である。
１０・・・基皐邂圧、１２・・・外部ｄ４整缶抗、１３
・・・電泳装置、１５・・・比較器、１６・・・ランチ
回路、１８・・・発振器、１９・・・リセット回路、２
０・・・デジタル−アナログ変換回路、２１・・・２進
カウンタ、２２￥３１ 口
地 ？ 口
佑 ３ 日
ト51ii'llK is a general closed-loop control type constant voltage power supply device, 42U is a conventional closed-loop control type constant voltage power supply device that includes an adjustment resistor in the base unit, and Figure 3 shows the detection voltage side. FIG. 4 is a schematic diagram of an example 1#4 in which the present invention is applied to a conventional closed-loop control type fixed-pressure power supply device in which an adjustment resistor is inserted. 10... Base pressure, 12... External d4 canning resistance, 13
... Electrophoresis device, 15 ... Comparator, 16 ... Launch circuit, 18 ... Oscillator, 19 ... Reset circuit, 2
0... Digital-to-analog conversion circuit, 21... Binary counter, 22 yen 31 Price? Kuchisuke 3 days
Claims (1)
整変化させる電圧調整装置において、成弁装置の基準電
圧を取り込み、該外部調整抵抗の分割部分の成田をこの
基準一圧と同−耐圧レベルになるように制御する手段と
、同−ｄ圧レベルになったことを検出した後、該基準電
圧に該外部調整抵抗の分割部分の電圧を並列に印加する
手段を設けたことを特徴とするイ源装置の出カゼ圧調整
裟蓋。1. In a voltage regulator that adjusts and changes the output voltage of a power supply device using an external Da adjustment resistor, the reference voltage of the valve control device is taken in, and the voltage of the divided portion of the external adjustment resistor is set to the same withstand voltage level as this reference voltage. and a means for applying the voltage of the divided portion of the external adjustment resistor to the reference voltage in parallel after detecting that the -d voltage level has been reached. A cover for adjusting the output pressure of the power supply device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15219081A JPS5854412A (en) | 1981-09-28 | 1981-09-28 | Voltage regulator for electric power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15219081A JPS5854412A (en) | 1981-09-28 | 1981-09-28 | Voltage regulator for electric power supply |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5854412A true JPS5854412A (en) | 1983-03-31 |
Family
ID=15535024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15219081A Pending JPS5854412A (en) | 1981-09-28 | 1981-09-28 | Voltage regulator for electric power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5854412A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2667960A1 (en) * | 1990-10-16 | 1992-04-17 | Siemens Automotive Sa | DEVICE FOR ESTABLISHING A CURRENT IN AN ANALOGUE PART OF AN INTEGRATED LOGIC AND ANALOG CIRCUIT. |
| US6163178A (en) * | 1998-12-28 | 2000-12-19 | Rambus Incorporated | Impedance controlled output driver |
| US6965262B2 (en) | 1999-10-19 | 2005-11-15 | Rambus Inc. | Method and apparatus for receiving high speed signals with low latency |
| US7088127B2 (en) | 2003-09-12 | 2006-08-08 | Rambus, Inc. | Adaptive impedance output driver circuit |
| US7269212B1 (en) | 2000-09-05 | 2007-09-11 | Rambus Inc. | Low-latency equalization in multi-level, multi-line communication systems |
| US7292629B2 (en) | 2002-07-12 | 2007-11-06 | Rambus Inc. | Selectable-tap equalizer |
| US7362800B1 (en) | 2002-07-12 | 2008-04-22 | Rambus Inc. | Auto-configured equalizer |
| US7456778B2 (en) | 1999-10-19 | 2008-11-25 | Rambus Inc. | Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals |
| US8861667B1 (en) | 2002-07-12 | 2014-10-14 | Rambus Inc. | Clock data recovery circuit with equalizer clock calibration |
-
1981
- 1981-09-28 JP JP15219081A patent/JPS5854412A/en active Pending
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2667960A1 (en) * | 1990-10-16 | 1992-04-17 | Siemens Automotive Sa | DEVICE FOR ESTABLISHING A CURRENT IN AN ANALOGUE PART OF AN INTEGRATED LOGIC AND ANALOG CIRCUIT. |
| US5418488A (en) * | 1990-10-16 | 1995-05-23 | Siemens Automotive, S.A. | Device for establishing a current in an analog part of an integrated logic and analog circuit |
| US7091761B2 (en) | 1998-12-28 | 2006-08-15 | Rambus, Inc. | Impedance controlled output driver |
| US6163178A (en) * | 1998-12-28 | 2000-12-19 | Rambus Incorporated | Impedance controlled output driver |
| US6661268B2 (en) | 1998-12-28 | 2003-12-09 | Rambus Inc. | Charge compensation control circuit and method for use with output driver |
| US6922092B2 (en) | 1998-12-28 | 2005-07-26 | Rambus Inc. | Impedance controlled output driver |
| US6342800B1 (en) | 1998-12-28 | 2002-01-29 | Rambus Inc. | Charge compensation control circuit and method for use with output driver |
| US7456778B2 (en) | 1999-10-19 | 2008-11-25 | Rambus Inc. | Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals |
| US6965262B2 (en) | 1999-10-19 | 2005-11-15 | Rambus Inc. | Method and apparatus for receiving high speed signals with low latency |
| US9544169B2 (en) | 1999-10-19 | 2017-01-10 | Rambus Inc. | Multiphase receiver with equalization circuitry |
| US9998305B2 (en) | 1999-10-19 | 2018-06-12 | Rambus Inc. | Multi-PAM output driver with distortion compensation |
| US7269212B1 (en) | 2000-09-05 | 2007-09-11 | Rambus Inc. | Low-latency equalization in multi-level, multi-line communication systems |
| US7292629B2 (en) | 2002-07-12 | 2007-11-06 | Rambus Inc. | Selectable-tap equalizer |
| US7362800B1 (en) | 2002-07-12 | 2008-04-22 | Rambus Inc. | Auto-configured equalizer |
| US8861667B1 (en) | 2002-07-12 | 2014-10-14 | Rambus Inc. | Clock data recovery circuit with equalizer clock calibration |
| US7088127B2 (en) | 2003-09-12 | 2006-08-08 | Rambus, Inc. | Adaptive impedance output driver circuit |
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