JPS5851615A - variable phase shift circuit - Google Patents

Abstract

PURPOSE:To obtain a variable phase shifting circuit which is easy for the adjustment of delay time and has an arbitrary pulse width, by driving a monostable mutivibrator through the use of a rising and a falling signal of an input pulse, shaping the pulse into a delayed pulse with a prescribed delay time and inputting the result to an FF. CONSTITUTION:A pulse A inputted from a terminal 4 with different period is delayed with an inverter 5 and a capacitor 6, compared with a signal A at an NAND gate 7 to form a signal B corresponding to a rising signal of the signal A. A signal C corresponding to the signal A is formed with inverters 8, 9, a capacitor 10 and an NAND gate 11. The signals B, C are shaped into a signal D at an NAND gate 12 to shape a signal E having a delay time width tau RC by operating a monostable multivibrator 13 with the rise of the signal D. In inputting the signal E to an FF14 as the clock pulse, the signal A is 1/2-frequency- divided at the FF14 to shape a desired signal F with the delay time tau. The uncertainty of phase at the application of power supply can be eliminated by resetting the FF14 with the signal B.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase shift circuit used in digital communications, and is a variable shift circuit that can arbitrarily delay or shift the phase of a waveform such as a clock pulse or a gator burst signal. Regarding phase circuits.

In general, waveform phase shifting methods for four-way pulses and data burst signals use a delay element represented by a delay line. There is one that slices into a crab shape with a delay time of 1.

In the former method, since the delay time depends on the dimensions of the delay element, fine adjustment becomes difficult once the pattern of the element is determined.

The latter method is constructed using two nest-stable multivibrators (hereinafter referred to as mono-multivibrators) as shown in Figure 1.

That is, the input signal is delayed by the delay time τ1 by the mono multivibrator l of iiP, 1, and the pulse of a predetermined pulse ring T having the delay time is shaped by the second mono multivibrator 2. The shaped pulse is Duty is 50%.

#! Figure 42 shows the waveforms at each point in Figure 1 (1)% (2) and (3). The clock pulse (1) is input to the mono-multivibrator 1, and at the rising edge of the pulse (1), a delay time τ,=C1·R8, is shaped into a delay pulse (2). In this case, an arbitrary value of τ can be obtained by varying the resistance R.

The pulse (3) of the output signal 5091I is output.

In this case, since the values of both the capacitor Cp and the resistor R1 fluctuate due to temperature changes, it is difficult to keep the pulse width Tt constant at all times.

As described above, in the conventional technology, ■ the delay time is fixed, and ■ the pulse width T changes depending on the temperature, and ■ the pulse waveform can be used only when the delay time is 50. There are drawbacks and restrictions on use, such as:

The present invention provides a novel variable phase shift circuit that solves the above-mentioned problems, allows easy adjustment of the delay time in y4, and has an arbitrary pulse width. The purpose of this is to drive a mono-multivibrator with the rising and falling signals of the input pulse to shape a pulse signal having a predetermined delay time, and to convert the pulse signal into a 7-rip, 7-p pulse. By driving the tube circuit to shape the phase shift signal t having the delay time and using the rising edge signal of the input pulse as a reset signal for the seven lip-flop circuits, the phase difference when the power is turned on is eliminated. This is achieved with a variable phase shift circuit that can eliminate determinism.

In other words, the waveform data is rounded to shift the phase of an arbitrary input pulse, and the rising and falling signals of the input pulse are used to drive a mono-multivibrator to create a delayed pulse with a predetermined delay time. The cough delay pulse is input to a flip/70-tub circuit as a clock pulse, and a pulse with a predetermined delay amount is shaped.

Further, by using the startup signal No. 8 as a reset signal for the 7 flip-flop circuit and controlling the flip-flop 70, phase uncertainty at the time of power-on is eliminated.

Hereinafter, the explanation will be given based on the time chart shown in FIG. 4 of Embodiment Tsumugi in FIG.

In the figure, input pulse waveforms A with different periods are input through input terminal 4, and waveform A is connected to inverter 5 and capacitor 6.
A desired delay is applied to the delayed waveform t! NAN
It is compared with waveform A at D gate 7, and waveform B corresponding to the rising signal of waveform A is obtained! carved. Further, in the circuit of the inverter 8.9:f capacitor 10 and NAND gate 11, the waveform C corresponding to the falling edge of the waveform A is shaped using the same principle as described above.

The waveform B and the CFiNAND gate 12 are used to shape the signal into a waveform. By operating the mono multivibrator 13 with the rising 9 signal of the cough waveform, the resistance R of the multivibrator 13 is applied to the leading and trailing edges of the input pulse waveform A.
and a constant delay time determined by capacitor C1 −
A large waveform E is shaped by τ=R1·C8. When this wave is input, the input pulse A is divided into 1/2 and a desired waveform F with a certain delay time is shaped. Therefore, the waveform F may be inverted by 180°.

This is called phase uncertainty and is an unavoidable phenomenon of the D-F-F 14, and the delay time at this time is τ+T, and the phase cannot be matched to the corresponding delayed signal.

As a countermeasure to this problem, input the narrow pulse waveform B obtained from the leading edge of the input pulse A to the reset terminal R of the D-F@F14, and control the D-F-F14 using the waveform B as a reset signal. Uncertainty can be removed.

FIG. 5 shows an example of application of the present invention, in which one gate circuit 1 is omitted from the case of FIG. 3, resulting in nine circuits. For the sake of explanation, Figure 84 will be used as the time chart.

The input waveform A is delayed by a minute time determined by the inverter 5 and the capacitor 6V, and the delayed waveform is sliced at a specified level by the next inverter 16, and the sliced level is exclusive-OR'ed (17). It is compared with the input waveform A and shaped into the waveform Dt. When this waveform and the input waveform A are input to the AND gate 18 and the output thereof is inverted by an inverter x9fm, the waveform B is shaped. Waveform and B
operates the phase shift circuit of this figure based on the same principle as that of FIG.

As described above, according to the present invention, since the delayed waveform is shaped based on the rising and falling signals of the input pulse, a delayed waveform always having the same pulse width as the input pulse is created.

[Brief explanation of drawings]

11 shows a conventional example, FIG. 2 shows a time chart of FIG. 1, FIG. 3 shows an embodiment of the present invention, FIG. 4 shows a time chart of FIG. 3, and FIG. 5 shows an application example of the present invention. In the figure, 1 is a four-stroke pulse generator, 2.3 is a mono multivibrator, 4 is an input terminal, and 5.8.9.16.19
is an inverter, 6.10 is a capacitor, 7.11.12
NAND gate, 13 is mono multivibrator, 1
4 indicates D-F-F, 15' indicates the output terminal.

Claims (1)

[Claims] A mono-multivibrator is driven using the rising and falling signals of the human-powered pulse to form a pulse signal having a predetermined delay time, and the pulse signal is converted into a four-pulse to drive a tree-flop circuit to perform the above-mentioned process. - By shaping a phase-shifted signal having a four-delay time and using the rising edge signal of the input pulse as an input signal for the flip-flop circuit, - the phase uncertainty at the time of input is eliminated; To be removed! Mold binding first variable phase circuit.