JPS5847739B2 - Character appearance order analysis device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION When translating a source program input into an electronic computer into a target program, the present invention is capable of translating a source program into a meaningful minimum unit of character strings after the source program is parsed into a meaningful minimum unit of character strings. The present invention relates to a character appearance order analysis device that analyzes character structure and character appearance order (syntax analysis).

Generally, when a program written in a high-level language such as COBOL or FORTRAN is converted into a sequence of machine language instructions that a computer can understand by a translation program called a compiler, the source program is first processed at the lexical analysis stage. After decomposition into system-defined words, user-defined words, character string data words, etc. consisting of a series of strings of minimum meaningful units, it is determined whether each word is composed of usable characters and the structure of the characters. Syntax analysis is being performed to determine whether a certain order is correct.

In this case, conventionally, the syntax analysis has been performed sequentially by software using a translation program, and a lot of time has been spent translating the high-level language program.

SUMMARY OF THE INVENTION An object of the present invention is to provide a character appearance order analysis device that eliminates the drawbacks of the conventional syntax analysis described above.

The character appearance order analysis device of the present invention includes a first storage means for storing a plurality of characters whose permissible source program is parsed and divided into meaningful minimum units, and a description of the permissible appearance order of the characters. a second storage means for storing words to be used;
third storage means for accumulating appearance progress information of the characters;
Checking whether the input character is a character stored in the first storage means, and determining the appearance order descriptor corresponding to the input character in the second storage means and the third
control means for checking whether the order of appearance is permissible according to the appearance progress information in the storage means, and for storing in the third storage means the state that the characters have been inputted. This is a device that checks the order in which characters in a string are constructed.

By using this invention, the syntactic analysis can be carried out efficiently because it is possible to determine whether or not a character is allowed, to accumulate the progress of character appearance order, to verify the order of character composition, etc., using dedicated hardware.

In the present invention, it is checked whether each character constituting a character string after word analysis is a permissible character.

For example, regarding numerical data, it is checked whether it is composed of numbers from 0 to 9, a decimal point, and signs tens and ones.

Further, in the present invention, the order in which characters appearing in the character string appear is checked.

For example, (1) the sign 10, -, and the currency symbol ¥ must appear at the beginning of the string, (2) the decimal point / can only be used once, (3) the editing character can be used multiple times, (4) It is possible to check that the first character must be an alphabetic character.

Next, the present invention will be explained in detail with reference to the drawings.

In the embodiment of the present invention described below, the high-level office language CO
The following simple rules are provided for checking whether the character string describing the editing format of numerical data used in BOL is correct.

(1) The three characters that can be used are -, 9, and .

(2) The character 9 can be used only once, and the character 1 ・ can be used only once.

(3) The character - cannot be written after the character 9,.

Therefore, in the above rules, the editing format is, for example, 9.
99, -999, -9・99 etc. are allowed, 9・9・
9,99 1st place is not allowed.

Next, the structure and operation of the character appearance order analysis device of the present invention, which analyzes whether a character string complies with the above-mentioned rules, will be explained in detail.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, the character appearance order analysis device of the present invention includes a storage means 1 for storing permissible characters, a storage stage 2 for storing words describing the permissible appearance order of characters, and a character appearance order progress of a character string. a storage means 3 for accumulating information; a control means 4 for sequentially checking whether an input character is an allowed character and checking whether the order of appearance of the characters is correct for each character in a character string; , and the input character string 5.

The storage means 1 for storing permissible characters is constituted by an ordinary associative memory, and in this embodiment, one memory is used to represent each character.
It has a storage capacity of 3 words in total, each word consisting of 8 bits,
Save the characters 9,,- as shown in FIG.

When a verification signal 47 is sent from the control stage 4, this storage means 1 verifies whether the character to be processed in the input character string 5 matches any of the three characters, and selects one of the three characters.
A match signal 11 indicating whether a character matches or not is generated, and a match signal 12 (3 bits) from each word storing the three characters.

The storage stage 2 for storing allowed appearance order descriptors is a normal memory consisting of three words equal to the number of allowed character types.

In this case, the number of bits for each word in the row direction is determined according to the desired appearance order rule, but the appearance order rule for one character is represented by one bit, and one word is made up of three bits as shown in Figure 3. .

Next, the bit configuration method of each appearance order descriptor will be explained using FIG. 3.

The storage means 2 can be configured as a matrix of 3 rows and 3 columns, each element of the matrix being represented by 1 bit and determined according to the following rules.

(1) Diagonal elements of the matrix (3a, 3b t3c
) is the binary value l when the corresponding character can occur only once.
and when it is allowed to appear multiple times, a binary value O is given (for example, the character 9 may appear several times, so element 3a is given O
, and the character * can only appear once, so elements 3b and 3c are 1).

(2) Ma. Other elements of the trix give a binary value of 0 when the character corresponding to a row can occur after the character corresponding to a column, and give a binary value of 1 when the character cannot appear (for example, element 3d gives a binary value of 1) It is set to 0 because the character * may appear after the character 9, and element 3e is set to 1 because the character - must not appear after the character 9).

A bit pattern according to the above two rules is shown in FIG.

As a result of matching the input character with the contents of storage stage 1, storage stage 2 receives a match signal 12 of 3 bits (binary value 1 at the time of a match), 1 bit from each character in storage stage 1.
, respectively, which indicate a binary value of 0 when there is a mismatch) are output.

A 3-bit appearance order descriptor 21 corresponding to the input character is extracted using address information created via a normal encoder (not shown) based on the coincidence signal.

The storage stage 3 that accumulates character appearance order progress information of a character string is a normal register consisting of 3 bits, which is the number of bits equal to the appearance order descriptor, and when one character appears,
By setting the bit position corresponding to the character to a binary value 1 according to the match signal 12 from the storage stage 1, it is possible to set the occurrence of the character in bit units so as to store the occurrence of the character. It has a structure that allows it to reset all its own bits at the start of analysis.

Furthermore, character appearance order progress information in this storage means 3 is supplied to the control stage 4 via a signal line 31 in order to verify the appearance order of the characters.

FIG. 4 is a detailed block diagram of the control means 4 for checking whether an input character is an allowed character and checking whether the order of appearance of the characters is correct.

In FIG. 4, the control stage 4 is composed of an AND circuit 41, a zero determination circuit 42, and a sequence control circuit 43.

The logical product circuit 41 can be made using three ordinary AND gates, and the appearance order descriptor 21 corresponding to the input character taken out from the storage stage 2 in FIG. In addition, a 3-bit AND is performed with the appearance order progress information 31 accumulated so far.

The zero detection circuit 42 is composed of a normal three-way OR circuit, and the result 4 of the 3-bit AND produced by the AND circuit 41 is
If at least one bit of 4 is a logic value 1, a logic value signal 1 is output to the signal line 45.

The sequence control circuit 43 can be constructed using a normal D-type flip-flop, and when a character string analysis request signal is given from an external device (not shown), the input character request signal 46 first analyzes the character string 5 to 1. Characters are extracted.

A verification signal 47 is then generated to the storage means 1 to check whether the character is included in the allowed character set.

As a result of the matching using the associative memory, a match signal 11 from the storage stage 1 and a match signal 12 from each character are output.

Further, when the match signal 11 indicates a mismatch state, the control circuit 43 outputs an invalid character signal 48.

Furthermore, when the coincidence signal 11 is in the coincidence state and the signal 45 representing the result of the logical product of the appearance order descriptor 21 corresponding to the input character and the character appearance order progress information 31 is in the 1 state, the control An invalid character signal 48 is output from the circuit 43 and, when in the O state, the bit corresponding to the character in the storage means 3 is set by the signal 50.

This operation is repeated for each character until the end of one character string. When it is determined that the character is allowed and the order of appearance is correct, a signal 49 indicating that this character string is correct is output. The signal is output from the control circuit 43.

Although the above has been explained in detail using examples, FIG. 5 specifically shows the case where the input character strings are (1) -9.9 and (2) 9.9. , shows the changes in the signals 21, 31, 45 and the storage stage 3 when each character is input.

The appearance order descriptor words stored in the storage means 2 in this embodiment are realized with one bit per character due to simple appearance rules, but if the appearance rules are complex, they may be realized with multiple bits. .

For example, if a regulation regarding whether or not characters can appear consecutively is added to the above example, this can be realized by using 2 bits for each character as shown in FIG.

In this case, the number of bits of the storage stage 3 is increased accordingly.

Furthermore, although the storage means 3 in this embodiment only has the function of simply setting the bit position corresponding to the character that appears, it may also be configured to be able to control the setting/resetting of other bit positions at the same time. can.

Furthermore, in this embodiment, the entire input character string is checked to see if it is correct, but each time each character is checked, the control signal and the contents of each storage means are sent to an external device. It is also possible to adopt a configuration in which:

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of the storage stage 1 shown in FIG. 1, and FIG. 3 is a diagram showing details of the contents of the storage stage 2 shown in FIG. 1. , FIG. 4 is a diagram showing the control means 4 of FIG. 1 in detail, FIG. 5 is a diagram showing changes in the control signal and each storage means in the embodiment shown in FIG. 1, and FIG. FIG. In FIG. 1, reference numeral 1 is a means for storing permissible characters, reference numeral 2 is a means for storing words describing the permissible order of appearance, reference numeral 3 is a means for accumulating occurrence progress information of characters, and reference numeral 4 is a means for storing words describing the permissible order of appearance. Each represents a means for controlling the checking of the order in which characters appear.

Claims (1)

[Claims] 1. A first storage means for storing a plurality of characters whose permissible source program has been parsed and divided into meaningful minimum units, and a second storage means for storing words describing the permissible order of appearance of said characters. a third storage means for accumulating occurrence progress information of said characters; checking whether an input character is a character stored in said first storage means; and said inputting said character in said second storage means. The third storage means checks whether the appearance order is permissible according to the appearance order descriptor corresponding to the input character and the appearance progress information in the third storage means, and records the status that the character has been input. A character appearance order analysis device for inspecting the order of character formation after word analysis.