JPS5842436B2 - Electronics - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic device that stores time-counted values in its designated memory by an external signal applied to the device.

In daily life, when we measure multiple lap times during competitions, we must use multiple stopwatches.

In view of the above-mentioned points, the present invention realizes an electronic device that measures lap time as a numerical value using simple operations and procedures.

The following is an explanation based on examples.

In Figure 1, 01-G2B are AND gates, R1-R8
is an OR gate, and 11 to I6 are inverters.

TG is a timing generation circuit for controlling the key signal generation circuit KS time counting circuit CNT display device Disp.

KS is 5TP1RAP, 1. A key signal generation circuit that is controlled by a timing signal from a timing generation circuit TG when each of the keys .about., 5 is input.

Fl is a flip-flop that is set and reset by the key STP, and F2 is a flip-flop that is set and reset by the key RAP.

STI to ST5 are registers for storing the numerical values of the time counting circuit CNT by gate signals controlled by key manual signals.

DR is a time counting circuit CNT or registers ST1 to ST5
This is a buffer register for displaying the numerical value of on the display device Disp.

The DEC displays the numerical value of the buffer register DR on the display device Dis.
This is a decoder for displaying p.

Hereinafter, an example of operation will be explained based on FIG.

Assuming that the flip-flops Fl and F2 are initially reset, the time counting circuit CNT is in a reset state by the Q'1'' signal of the flip-flop F1.

It is also assumed that the buffer register DR and registers ST1 to ST5 are cleared.

Therefore, the display device Disp is displaying the zero value of the buffer register DR.

Next, when the key STP is operated, the key signal generation circuit K
S, the 1-bit signal is sent to the AND gate G1. G2's 1
Input to input terminal.

Here, since the flip-flop F1 has been reset, the AND gate G2 is opened and the flip-flop F1 is set.

Therefore, the time counting circuit CNT starts counting, and this counted value is inputted to the buffer register DR via the AND gate G25 and the OR gate R6, and is input to the decoder DEC.
After that, it is displayed on the display device Disp.

Next, when the key RAP is operated, the key signal generation circuit KS
As a result, a 1-bit signal is passed through the AND gates G3 and G4.
Input to input terminal.

Since the flip-flop F2 has been reset here, the ``1'' signal of Q of the flip-flop opens the AND gate G4 and sets the flip-flop F2.

Next, when number key 1 is operated, key signal generation circuit K
A 1 read signal is generated by S, and the Antogame)G15
is input to the 1 input terminal of.

Here, since the flip-flops Fl and F2 are set, the AND gate G15 is opened by each "1" signal, and the value of the time counting circuit CNT is changed by the "1" signal to the AND gate G6 and the OR gate. It is input to register STI via R1.

At the timing of the next word, the signal line (2) becomes "Ou", so the AND gate G15 is closed, and this inverter signal causes the value in the register ST1 to be held via the AND gate G5 and the OR gate R1.

Next, n 3 tj, 2 u, n 5? +,”4
'', the time-counted values of the time counting circuit CNT when the keys were input are stored in the registers ST3 and Sr1, respectively, in the same manner as described above.

Sr1, input to Sr1 and stored.

Next, when the key RAP is operated, the key signal generating circuit KS generates a 1-bit signal on the signal line (2), and the 1'' signal of the Q of the flip-flop F2 resets the flip-flop F2 via the AND gate R3.

Next, when the numeric key n1n is operated, the key signal generating circuit KS generates a signal on the word signal line ■, but the ant game) G15 is not opened due to the tI O+1 signal of the Q of the flip-flop F2, and therefore the time count circuit CNT
The numerical value is not input to register ST1.

The same thing can be done even if the other number keys 2 to 5 are operated.

Next, when the key STP is input, a 1-bit signal is generated on the signal line (2) by the key signal generating circuit KS, and the flip-flop F1 is reset by the Q'1'' signal of the flip-flop F1 via the AND gate G1.

At the same time, until now it has been counted by the time counting circuit CNT.
The numerical value input to the register DR is the 1" signal of the Q of the flip-flop F1 and the O of the Q of the flip-flop F2.
The AND gate G27 is opened by the inverter signal of the ``signal, and the signal is held in the register DR via the OR gate R6.

Further, the time counting circuit CNT is reset by the "1" signal of Q of the flip-flop F1.

Next, when the key RAP is input, the key signal generation circuit KS generates a 1-bit signal on the signal line
is set.

Next, when the number key f+299 is input, a 1-word signal is generated on the signal line ■ by the key signal generation circuit KS, and the AND gate G21 is opened for one word, and the ``+In signal of Q of the flip-flop F2 and , orgate R8
r'' signal causes AND gate G28 to be ``1'' for one word, and this '1191 signal and the Q signal of flip-flop F1 to open AND gate G26, so the value in register ST2 is 1 word. Between, AND gate G21, OR gate R7, AND gate G26
It is input to register DR via OR gate R6, and from the next timing on, AND gate G27, OR gate) R6
The data is held in the register DR through the gates of each of the registers DR and displayed on the display device Disp through the decoder DEC.

Next, register STI is opened in the same way as above by manually pressing the keys '1', '5', '4' and 3'.

The numerical values of Sr1, Sr1, and Sr1 are input to the register DR and displayed on the tag display device Disp.

Next, when the key RAP is operated, a 1-bit signal is generated on the signal line ■ by the key signal generation circuit KS, and the AND gate G3 is opened by the °'1'' signal of the Q of the flip-flop F2, and the flip-flop F2 is reset. Ru.

Next, by inputting each of the numeric keys t11tl to 915tl, a 1-word signal is generated on each of the signal lines ■ to 0. and 026 are not opened, and the respective numerical values of registers ST1 to ST5 are not input to register DR.

As described above, the present invention allows lap times to be calculated with simple operations and procedures by using means for storing a plurality of time-counted values, that is, lap times, and reading out the plurality of stored values, that is, lap times. It is possible to realize measurement.

In the embodiment, the number keys 1 to 5 were used to specify the memory device, but it is also possible to specify N memory devices using the number keys 0 to 9, etc., and these number keys are used for time counting. It can also be used to initialize a circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an electronic device according to the present invention. 1.2, 3, 4.5 are number keys, Fl and F2 are flip-flops, and CNT is a time counting circuit.

Claims (1)

[Claims] 1. An input means equipped with a plurality of keys, a time counting means,
a plurality of storage means provided corresponding to each of the plurality of keys; a state storage means for storing a state of the device; a means for causing the state storage means to store a first state or a second state; In response to the operation of each of the plurality of keys in accordance with the first state stored in the state storage means, causing the time counting means to store time information in each of the plurality of storage means, and the state storage means control means responsive to the second state stored in the storage means and in response to each operation of the plurality of keys to derive time information stored in each of the plurality of storage means and send it to the display means. device.