JPS5833865A - Semiconductor memory device and manufacture thereof - Google Patents

Abstract

PURPOSE:To package a PROM having a fuse without decreasing the writing yield and the reliability by sealing a resin layer to allow a cavity to remain in the hole of an insulating film part on the fuse. CONSTITUTION:A polycrystalline silicon wire 29 formed at a PROM partly has a narrow fuse 28. First, the PROM is covered entirely with a protective insulating film 32. Thereafter, the film 32 on the fuse 28 is opened at a hole 37. Then, a spin-ON glass film is formed at the periphery of the hole 37, and a refractory organic macromolecular film 35 is then covered on the overall surface. A hole of small diameter is formed at the film 35 corresponding to the hole 37, and the spin-ON glass film is dissolved and removed through the hole. Thereafter, the entire element is molded with epoxy resin 40. In this case, since the inlet side of the hole 37 has a small diameter, the resin does not enter into the entire hole 37, but a cavity 39 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly to a writable read-only semiconductor memory device and a method of manufacturing the same.

This type of semiconductor memory device, PROM (Progra
Heat expansion type and junction destruction type are known in mbleR@adgatyhpresentq). After manufacturing, such a FROM can be used as a read-only device by writing contents according to the purpose of use. For this writing, a relatively large current is applied to the selected memory cell, causing the fuse to melt or #'
A temperature rise is essential because it causes destruction of the IPN junction. In particular, in the case of a fuse type, the atmosphere and conditions around the fuse for fuse blowing and oxidation during writing pose problems.

Incidentally, a FROM having a writable memory cell having islands usually has the structure shown in FIG. That is, 1 in the figure is a p-type silicon substrate, and this substrate I
In K, an n-type buried layer 2 is provided, and an n-type silicon epitaxial layer 3 is formed as one collector region. A p-type space region 4 is provided in this epitaxial layer 3, and an n+-type emitter region 5 is provided within the space region 4. An interlayer insulating film 6 is provided on the epitaxial layer s, and an interlayer insulating film 6 is provided on the epitaxial layer s.
A polycrystalline silicon wiring 8 is provided above, one end of which is connected to the emitter region 5 through a contact hole 71 of the insulating film 6. The polycrystalline silicon wiring 8 functions as an emitter wiring and has a narrow heater 9 in a part. Furthermore, an A4 wiring 10 serving as a bit line is connected to the other end of this polycrystalline silicon wiring 8. A contact hole 7 of the insulating film 6 is formed on the interlayer insulating film 6.
A pace At arrangement connected to the base region 4 via 3
11 are provided. Then, a protective insulation layer 12 is applied to the entire surface.
A window IJ is formed in a portion of the protective insulating film 12 on the heater 9 of the polycrystalline silicon wiring 8.

In the PROM having the above-described structure, when a write current is applied to the polycrystalline silicon wiring 8 on the glabella insulating film 6, the fuse 9 is fused due to heat generation and becomes open. At that time, the condition around the fuse 9 was such that air was in contact with the window 13 of the protective insulating film 12, as shown in FIG.
The button is designed so that the fuse 9 can be easily fused and the fused surface can be oxidized. However, the Hi-zu type FRO shown in FIG.
In case M, if a plastic mold is used to form a cross-cage, the window 13 of the protective insulating film 12 will be covered with resin, so that the fuse will not easily melt or oxidize during writing, which will impede the writing operation. and write it
There is a drawback that the memory cells that have been turned on will become conductive again over time.For this reason, wired PROMs are mainly packaged in ceramic bags, but there is one problem in the arm cage.
The cost of doing so cannot be ignored and is an obstacle to cost reduction.

The present invention has been made in view of the above-mentioned circumstances, and provides a semiconductor memory device that can be packaged in an inexpensive plastic mold without deteriorating write yield or reliability. This is an attempt to provide a possible method.

Hereinafter, the present invention will be described as a polycrystalline silicon heat type PROM.
An example in which K is applied will be described along with a manufacturing method.

Example 1 [:] First, an n0 buried layer 22 is formed on a p-type silicon substrate 21.
After forming an n-type silicon epitaxial layer 23, CVD-5 is applied on the epitaxial layer 23.
An in2 film 24 was deposited.

Subsequently, a p-type impurity, for example, Ron, was ion-implanted into the silicon epitaxial layer 23 through the CVD-8102 film 241i, and activated to form a p-type base region 25. Continuing, an emitter aperture window 261 is formed at αD-810°MB2, and n is emitted through this aperture window 261.
type impurities, such as arsenic, are diffused into the base region 26.
A + type emitter region 27 was formed (as shown in FIG. 2(, )).

[11] Next, a polycrystalline silicon layer is deposited on the entire surface, and this is turned by photo-etching technology so that one end is connected to the emitter region J7 through the opening window 261, and the other end is connected to the emitter region J7 through the opening window 261. Polycrystalline silicon wiring 2# having narrow islands 28f extending over the film 24
was formed. Subsequently, after forming the pace aperture window 26 snow, an At film was vacuum deposited on the entire surface, and this was
Then, the base L wiring SO1 connected to the space region 25 through the opening window 263 and the At wiring 11 as a bit line connected to the other end of the polycrystalline silicon wiring 29 were formed. Subsequently, after depositing a phosphorous-doped glass film (PSG film) IJ as a protective insulating layer on the entire surface, the PSG film 3 above the beads 28 of the polycrystalline silicon wiring 29 is deposited.
A first opening 32f was formed by selectively removing the etching (as shown in FIG. 2(b)).

13 Next, the entire surface is coated with a first thin film, such as a spin-on glass film, so that the first openings 33 are filled, and then this is buttered to form a spin-on glass film around the first openings 3J. 'I left it. Subsequently, the entire surface is covered with a second thin film, for example, a heat-resistant organic polymer film 35, and a second thin film 5sy, which corresponds to the first opening ssK, and a second thin film having a smaller diameter than the opening S3, for example, 10 μm x 10 μm square is formed. An opening 36 was formed (as shown in FIG. 2(, )).

[1■] Next, the spin-on glass film 34t is dissolved and removed through the second opening 3it of the polymer film 35. Second
An aperture portion 31 consisting of an aperture was formed. Subsequently, after forming an At electrode 28 on the back surface of the substrate 21, an element having a memory cell is produced by, for example, scribing and cutting, and is further mounted on a lead claim (not shown), wires are attached, and then resin, For example, it was molded with synthetic resin. At this time, since the entrance side of the opening 31 has a small diameter, the resin does not enter the entire inside of the opening 31 and remains as a cavity 39).
A ROM was manufactured (as shown in FIG. 2(d)).

Therefore, as shown in FIG. 2(d), the FROM of the present invention has an opening 31 in the insulating coating portion formed by the PgG film 32 and the polymer film 35 above the hyx- and +e 2 g of the polycrystalline silicon wiring 2g. is provided on this film, and the Nyxi resin layer 40t is sealed so as to remain as a cavity 39 without completely filling the inside of the opening 31. As a result, when a write current is passed from the At wiring 11 to the polycrystalline silicon wiring 29, since the cavity 39 filled with air is provided above the fuse 21 of the multilayer silicon wiring 29, the heating current 28 can be reliably fused. Therefore, even if a plastic molded package is used, the writing characteristics and reliability of the heaters will not be deteriorated, so that a low-cost FROM can be obtained. Further, according to the method of the present invention, a FROM having excellent write characteristics can be easily and mass-produced at low cost.

In Example 1 above, a spin-on glass film was used as the first thin film and a heat-resistant organic polymer resin film was used as the second thin film, but the invention is not limited to this. It is only necessary to select a material that has selective etching properties for the second thin film. In terms of A, a metal such as At is used as the first thin film, and a low temperature oxide film or low temperature threatened M is used as the second thin film. Good too.

Example 2 [1] By the same process as in Example 1, the paste HT wiring IO and the MU wiring J1 as the bit line were formed 1, an insulating film of tXl having a high dissolution rate, such as a P8G film 41, and a PSG film 4 A second insulating film having a low dissolution rate, for example, a 5in2 film 42, was sequentially deposited on the film (as shown in FIG. 3(a)).

(it) Next, the portions of the 8102 film 42 and the PSA film 41 located above the heater 28 of the polycrystalline silicon layer #29 are selectively etched away. At this time, Figure 3 (
As shown in b), an inverted chi-9 shaped opening 4S was formed.

(iii) Next, an element having a memory cell was produced in the same manner as in Example 1, mounted on a lead frame, wired, and then molded with a resin. At this time, since the inlet side of the inverted tapered A4-shaped opening 430 is small, the resin does not penetrate into the entire opening 43 and remains as a cavity J9'. A sealed FROM was manufactured (as shown in FIG. 3(c)).

Therefore, even if the FROM obtained in Example 2 employs a plastic mold package as in Example 1O, the writing characteristics and reliability of the heaters do not deteriorate, so that cost reduction can be realized. Furthermore, according to the above method, FROM 1 having the above-mentioned characteristics can be manufactured through simpler steps than the method of Example 1.

In Example 1.2 above, polycrystalline silicon was used as the material for the heat shield, but it may also be formed from a metal such as nichrome or a titanium-tungsten alloy.

Furthermore, in Examples 1 and 2 above, the cavity above the heat is filled with air, but this cavity may also be filled with an oxidizing gas, such as oxygen. In this way, the writing characteristics of the heat can be further improved. You can improve.

As detailed above, according to the present invention, it is possible to use an inexpensive plastic molding structure without deteriorating the write yield or reliability, and to provide a semiconductor memory device and a semiconductor memory device that can achieve a significant cost reduction. It is possible to provide a method for mass-producing semiconductor memory devices.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view of FROM with the heater part open.
Figures 2-) to (d) are process cross-sectional views showing the manufacturing of a polycrystalline silicon bridge type PROM in Example 1 of the present invention, and Figures 3 (a) to (C) are examples of the present invention. FIG. 2 is a process cross-sectional view showing the manufacture of the FROM in Step 2. 21...p-type silicon substrate, 22...n+ buried layer, 23...n-type silicon epitaxial layer, 2M-
-p type base region, 27...n+ type emitter region, 2
8...Fuse, 29...Polycrystalline silicon wiring, 3
0...Base At wiring, 31...At wiring (pit line), JJ, 4J-...PSG film, 34...Spin-on glass film, 37.43...Opening part, Ij9#3
9'...Cavity°, 40...Epoxy resin layer.

Claims (1)

[Claims] 1. In a semiconductor memory device equipped with a writable memory cell having heat and e, an opening is provided in an insulating coating above the heat, and an opening is provided on the insulating coating. A semiconductor memory device characterized in that the resin layer is sealed so that the resin layer does not completely fill the inside of the opening but remains as a cavity. 2. The semiconductor memory device according to claim 1, characterized in that a resin layer is sealed on the insulating coating with an oxidizing gas filled in the openings of the coating. 3. When manufacturing a semiconductor memory device equipped with a writable memory cell having a fuse, after forming an insulating layer covering the fuse, a portion of the insulating layer above the fuse is formed. forming a first opening in the insulating layer, forming a first thin film near the first opening in the insulating layer, and coating the first thin film with a second thin film; forming a second aperture smaller in diameter than the aperture in six second thin film portions corresponding to the first aperture; and removing the first thin film through the second aperture. A step of forming an opening in an insulating coating made of the insulating layer and a second thin film, and a step of sealing the entire insulating coating with resin so that it remains as a cavity without filling the entire inside of the opening. A method of manufacturing a semiconductor memory device, comprising: 4. When manufacturing a semiconductor memory device equipped with a writable memory cell having a heater, a step of forming a first isolation film covering the heater, and a step of forming a nuclear insulating film and a silicon film on this insulating film are performed. a step of forming a second insulating film having a low dissolution rate; and a step of forming a second insulating film located above the heater. The first insulating film is selectively etched away. A step of forming an inverted chi/four-shaped opening in the insulation coating made of the second insulation film, and sealing the entire insulation coating including the resin so that it remains as a cavity without filling the entire opening. 1. A method of manufacturing a semiconductor memory device, comprising a step of stopping the process.