JP2861239B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a technology effective for a nonvolatile memory configured using a diode and a silicon film.

[Conventional technology]

In the conventional structure, as shown in FIG. 3, 1 is a semiconductor substrate, 2 is a first insulating film, 14 is a lower wiring (a polycrystalline silicon film containing a high concentration of impurities, etc.), and 13 is a semiconductor film (1 × 10 ¹⁷ atoms
・ Polycrystalline silicon film containing impurities of about cm ^-3 ),
9 is a second insulating film, 12 is a metal film (such as titanium or platinum), 10
Denotes an intrinsic silicon film (such as a polycrystalline silicon film containing no impurities), and 11 denotes a wiring layer (such as an aluminum film).
As shown in FIG. 3, an intrinsic silicon film is formed on a Schottky barrier diode including a metal film 12 and a semiconductor film 13 as one of the nonvolatile memories using a diode and a silicon film as one cell. There is a structure in which these are arranged in a lattice as shown in FIG. One cell is formed by a switch and a diode, and information is determined based on ON and OFF of the switch. This structure is called 1TIMEPROM (read-only memory that can be electrically written only once). In FIG. 4, the diode is a Schottky barrier diode. The diodes serve to block current from other cells when arranged in a grid. In addition, an intrinsic silicon film plays a role in the switch.

That is, the resistance of the intrinsic silicon film is high before electrical writing. That is, since only a small amount of current flows even when a voltage of about 5 V is applied, the switch is turned off (OFF state). Write electrically, ie 20V
When the voltage before and after is applied to the intrinsic silicon film, the intrinsic silicon film is broken and a current easily flows, so that the intrinsic silicon film is turned on (ON state).

1 TIMEPROM before the destruction of the intrinsic silicon film
Information is extracted based on the magnitude of the later current value.

[Problems to be solved by the invention]

However, the conventional technique has a problem that the current value does not increase so much even if the intrinsic silicon film is broken. For example, when the contact hole diameter is 1.2μm, it is OFF
In the state, the resistance value is 1 MΩ, and in the ON state, it is as high as 50 KΩ. Therefore, the voltage applied to the diode decreases, and the current that can flow in the forward direction decreases.

As described above, 1TIMEPROM determines information based on the magnitude of current. That is, the greater the difference in the current, the more the sensing capability of the current sensing circuit connected to the cell is allowed, and the more accurate the operation can be made. Also, circuit design becomes easy. Also, it can cope with product variations of mass-produced products.

However, in the prior art, before the destruction of the intrinsic silicon film,
Since the current difference later is small, there is a problem that it is difficult to sense the current, and thus it is impossible to make a 1TIMEPROM. It is still difficult to form the metal film 12 of the Schottky barrier diode selectively in the contact hole.

Therefore, the present invention is to solve such a problem, and an object of the present invention is to provide a 1TIMEPROM memory cell having a large difference between ON and OFF currents.

[Means for solving the problem]

A semiconductor device according to the present invention includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a P-type region provided on the first insulating film, and disposed in contact with the P-type region. A first silicon film having an n-type region to be formed;
A second insulating film provided on a silicon film and having a contact hole on the P-type region or the N-type region of the first silicon film; and a P-type region or the N-type region in the contact hole. A second silicon film provided thereon and including an intrinsic or trace amount of an impurity element; and a wiring layer provided on the second silicon film.

The method for manufacturing a semiconductor device according to the present invention includes a step of forming a first insulating film on a semiconductor substrate, and a step of forming a first insulating film on the first insulating film.
Forming a silicon film; and forming the first silicon film on the first silicon film.
A step of introducing an impurity of a first conductivity type; and a step of selectively introducing a second conductivity having an opposite conductivity type to the first conductivity type in a region of the first silicon film into which the impurity of the first conductivity type is introduced. Forming a region having the first conductivity type in the first silicon film and a region having the second conductivity type in contact with the region having the first conductivity type by introducing an impurity of a mold type. Forming a second insulating film having a contact hole on a region having the first conductivity type or a region having the second conductivity type, and forming a second silicon film in the contact hole And the second
Forming a wiring layer on the silicon film.

〔Example〕

FIG. 1 is a sectional view of a semiconductor device according to one embodiment of the present invention. 2 (a) to 2 (d) are main cross-sectional views for each manufacturing process.

In all the drawings of the embodiments, those having the same functions are denoted by the same reference numerals, and the repeated description thereof will be omitted.

Hereinafter, description will be given with reference to FIGS. 2 (a) to 2 (d). Here, an example in which an intrinsic silicon film is formed on a P-type region to make the same as FIG. 4 will be described.

First, as shown in FIG. 2 (a), a CVD
The first insulating film 2 is formed by a method (chemical vapor deposition).
About 5000 で of SiO ₂ film would be appropriate. And the first
The polycrystalline silicon film 3 is deposited on the insulating film 2 by the CVD method for 2000.
Degree formed. Usually, polycrystalline silicon is deposited by thermal decomposition of monosilane gas. Then, in order to convert the polycrystalline silicon film 3 into a diode, first, an N-type impurity (V group element) is implanted into the polycrystalline silicon film 3. Normally, using ion implantation method, phosphorus is DOSE at energy of 40Kev
The implantation is performed at a dose of 5 × 10 ¹³ atoms · cm ⁻² . This becomes the N-type region 4 of the diode.

Next, as shown in FIG. 2B, in order to form a P-type region 5 of the polycrystalline silicon film 3, the polycrystalline silicon film 3 is formed.
A resist mask 8 is formed on the other portions of
Type impurities (group III elements) are implanted. Similarly to the N-type region, boron is implanted by ion implantation at an energy of 30 Kev and a DOSE amount of 5 × 10 ¹⁵ atoms · cm ⁻² . The N-type region is canceled by one digit or more than the impurity amount of the N-type region to make it a P-type region. Thereafter, the resist mask 8 is removed with sulfuric acid or the like.

Next, as shown in FIG. 2C, a second insulating film 9 is formed. It would be appropriate to form a SiO ₂ film of about 2000 法 by CVD. Then, the second insulating film 9 on the P-type region 5 is removed by a photo and etching method. It may be appropriate to etch with an aqueous solution of hydrofluoric acid. Then, heat is applied to activate each impurity. Heat treatment is performed at 1000 ° C. for 60 seconds in a N ₂ atmosphere using a halogen lamp.

Next, as shown in FIG. 2D, an intrinsic silicon film 10 serving as a switch is formed by a CVD method. Around 1000Å to 2000Å would be appropriate. Then, unnecessary portions of the intrinsic silicon film 10 are removed by a photo and etching method.

Next, as shown in FIG. 1, a wiring layer 11 is formed on the intrinsic silicon film 10 to obtain an embodiment of the present invention. The wiring layer
As 11, an aluminum film of about 1 μm would be appropriate.

As described above, when the diode is formed in the polycrystalline silicon film, for example, when the contact hole diameter is 1.2 μm, O
In the FF state, the resistance is 1 MΩ, but in the ON state, the resistance can be as low as 1 KΩ. Therefore, the voltage applied to the diode does not drop so much, the forward current is large, and the difference between the ON state and the OFF state is large.
It is considered that this is because, at the time of the destruction, the impurities in the lower P-type region 5 flow into the destructed portion.

In addition, a technique for forming a diode in polycrystalline silicon, that is, a technique for forming an N-type region and a P-type region, is generally used. It is a photo and ion implantation method, can be easily manufactured, and requires a small number of steps.

When the cells of this embodiment are arranged in a lattice as shown in FIG. 4, it is necessary to connect the N-type regions between adjacent cells.

As described above, the invention made by the inventor has been specifically described based on the above-described embodiment. However, the present invention is not limited to the above-described embodiment, and may be variously modified without departing from the gist thereof. Of course.

〔The invention's effect〕

As described above, according to the present invention, in the semiconductor film,
By forming a P-type region and an N-type region and forming an intrinsic silicon film on one of them, the amount of current before and after the intrinsic silicon film is electrically broken is greatly different. Therefore, it is possible to make 1TIMEPROM.
In addition, the sensing capability of the current sensing circuit, which is an internal circuit, has a margin and can work accurately. It can also respond to product variations during mass production. It is easy to make,
Fewer processes are required.

[Brief description of the drawings]

FIG. 1 is a main sectional view showing one embodiment of a semiconductor device of the present invention. 2 (a) to 2 (d) are main cross-sectional views for explaining an example of a method for manufacturing a semiconductor device of the present invention in the order of steps. FIG. 3 is a main sectional view showing a conventional semiconductor device. FIG. 4 is a circuit diagram of a one-time electrically writable nonvolatile memory using a diode. DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... First insulating film 3 ... Polycrystalline silicon film 4 ... N-type region 5 ... P-type region 6 ... N-type impurity ion beam 7 ... P-type impurity ion beam 8 ... Resist mask 9 Second insulating film 10 Intrinsic silicon film 11 Wiring layer 12 Metal film 13 Semiconductor film 14 Lower wiring layer

Claims (2)

(57) [Claims] A semiconductor substrate; a first insulating film provided on the semiconductor substrate; a P-type region provided on the first insulating film;
A first silicon film having an n-type region disposed in contact with the mold region; and a first silicon film provided on the first silicon film and on the p-type region or the n-type region of the first silicon film. A second insulating film having a contact hole, the P-type region or the N
A semiconductor device comprising: a second silicon film provided on a mold region and containing an intrinsic or trace amount of an impurity element; and a wiring layer provided on the second silicon film. A step of forming a first insulating film on the semiconductor substrate; a step of forming a first silicon film on the first insulating film; and a step of forming a first conductivity type impurity on the first silicon film. And selectively introducing a second conductivity type impurity having a conductivity type opposite to the first conductivity type into a region of the first silicon film into which the first conductivity type impurity has been introduced. Forming a region having the first conductivity type in the first silicon film and a region having the second conductivity type in contact with the region having the first conductivity type; Forming a second insulating film having a contact hole on a region having a mold or a region having the second conductivity type; forming a second silicon film in the contact hole; Step of forming a wiring layer on a film A method of manufacturing a semiconductor device characterized by having a.