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JPS5822459A - Interrupt request monitoring method - Google Patents

Interrupt request monitoring method

Info

Publication number
JPS5822459A
JPS5822459A JP56119058A JP11905881A JPS5822459A JP S5822459 A JPS5822459 A JP S5822459A JP 56119058 A JP56119058 A JP 56119058A JP 11905881 A JP11905881 A JP 11905881A JP S5822459 A JPS5822459 A JP S5822459A
Authority
JP
Japan
Prior art keywords
request signal
interrupt request
program
interruption
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56119058A
Other languages
Japanese (ja)
Inventor
Masahiro Kitano
北野 昌宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56119058A priority Critical patent/JPS5822459A/en
Publication of JPS5822459A publication Critical patent/JPS5822459A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To close the interruption mask of an opposite processor in case of the occurrence of a fault in a processor, and to securely prevent the program looping of the processor, by adding an interruption request signal monitoring part to the processor. CONSTITUTION:Processors 1 and 2 constitute a data processing system, and they normally perform processing independently and allows interruption processing between them at need. The processor 2 which receives an interruption request signal from the processor 1 is provided with an interruption request signal monitoring part 4, an interruption request processing program 3, and an interruption control part 5. The interruption request signal is sent through an interruption request signal line and analyzed by the control part 5 and when the interruption mask of the control part 5 is opened, the program 3 is started. In the monitoring part 4, the ceasing of the request signal is stored without reference to the execution of the program 3 to monitor the time difference from monitoring indication from the program 3, and if the processor 1 breaks down to send the request signal continuously, an alarm is sent to the program 3 to close the mask of the control part 5, thus preventing the program looping of interruption processing.

Description

【発明の詳細な説明】 本発gAFi、独立した処理装置によって構成されるデ
ータ処塩システム忙係り、特に外部からの誤動作による
不当な割込による処理装置のプログラムルーズを防止す
るに好適な割込要求監視方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The gAFi developed by the present invention is an interrupt system suitable for preventing a data processing system configured by an independent processing device from becoming loose due to an inappropriate interrupt caused by an external malfunction. This relates to a request monitoring method.

従来の処理装置における割込処理は、外部からのハード
ウェア信号である割込要求信号と割込マスクだけで制御
される。割込要求信号は割込マスクが開いている場合は
即座に受は付けられ、処理装置はその時実行していたプ
ログラムを中断し、割込要求処理プログラムの実行を開
始し、割込要求元に対し終了終了報告をし、再び中断し
ていたプログラムの実行を始める。この場合1割込要求
を出し九装置忙何らかの障害が発生し割込要求信号がオ
ンのままとなると、処理装置は割込要求処理のループに
陥いるという欠点がある。
Interrupt processing in a conventional processing device is controlled only by an interrupt request signal and an interrupt mask, which are external hardware signals. If the interrupt mask is open, the interrupt request signal is accepted immediately, and the processing device interrupts the program that was being executed at that time, starts executing the interrupt request processing program, and sends the interrupt request signal to the interrupt request source. It reports completion and resumes execution of the interrupted program. In this case, if one interrupt request is issued and nine devices are busy, if some failure occurs and the interrupt request signal remains on, the processing device has the disadvantage that it will fall into a loop of interrupt request processing.

本発明の目的は、前記の如き従来の問題点を除去するも
のであり、割込要求を出した装置に生じた障害によって
割込要求処理を行なう処理装置がプログラムループする
ことを防止する手段を提供することにある。
An object of the present invention is to eliminate the above-mentioned conventional problems, and to provide means for preventing a program loop in a processing device that processes an interrupt request due to a failure occurring in the device that issued the interrupt request. It is about providing.

本発明の特徴とするところは、処理装置に割込要求信号
監視部を付加することにより、割込要求を発生した装置
に障害が発生し、当該装置。
A feature of the present invention is that by adding an interrupt request signal monitoring section to the processing device, a failure can occur in the device that has generated the interrupt request.

が割込要求処理終了報告を受けても割込要求信号を出し
放しとなっている状態を検知可能とするところKある。
In some cases, it is possible to detect a state in which the interrupt request signal is not being output even after receiving a report that the interrupt request processing has been completed.

以下1本発明の一実施例を第1図により説明する。第1
図はデータ処理システムにおける1つの処理装置で本発
明を実施した場合の概念図である。処理装置1,2はデ
ータ処理システムにシける構成要素であり通常互いに独
立に処理を行なうものとする。処理装置1が処理装置2
に対して割込要求信号を出したとする。処理装置2は割
込制御部の割込マスクが開い次時に割込を受は付け、そ
の時実行してい友プログラムを中断し、割込要求処理プ
ログラムの実行を開始する。
An embodiment of the present invention will be described below with reference to FIG. 1st
The figure is a conceptual diagram when the present invention is implemented in one processing device in a data processing system. Processing devices 1 and 2 are components of a data processing system, and normally perform processing independently of each other. Processing device 1 is processing device 2
Suppose that an interrupt request signal is issued to . The processing device 2 accepts the interrupt the next time the interrupt mask of the interrupt control section is opened, interrupts the friend program being executed at that time, and starts executing the interrupt request processing program.

割込要求処理プログラムは、tず割込要求信号監視@4
に@視指示を出し1割込要因を解析して適蟲な処理を実
行し割込要求処理終了報告をする。割込要求信号監視部
4はプログラムの実行に関係なく割込要求信号の消滅を
記憶する。
The interrupt request processing program is tzu interrupt request signal monitoring @4
It issues an @view command to analyze one interrupt cause, executes appropriate processing, and reports the completion of interrupt request processing. The interrupt request signal monitoring unit 4 stores the disappearance of the interrupt request signal regardless of program execution.

その後、I&珊装置2が割込要求処理終了報告を受けて
から割込要求信号を消滅させるまでの時間差分を持って
から割込要求信号監視部4を参照し、処理装置1の障害
で割込要求信号が出し放し釦なっているかどうかを調べ
る。割込要求処理プログラムが割込要求信号監視部4を
参照した際、処理装置1の障害によって割込要求信号が
出し放しであると判断した際は外部警報装置6に対し処
理装置IK障害が発生し九事を知らせ1割込制御部5に
対し割込マスクを閉じる様九指示口、中断していたプロ
グラムに制御を返す。割込要求信号が正常に消滅したと
判断した場合は1割込マスクを開いて中断していたプロ
グラムに制御を返す。
After that, the I&S device 2 refers to the interrupt request signal monitoring unit 4 after having the time difference from receiving the interrupt request processing completion report to erasing the interrupt request signal, and interrupts the interrupt request due to a failure in the processing device 1. Check whether the input request signal is released or not. When the interrupt request processing program refers to the interrupt request signal monitoring unit 4 and determines that the interrupt request signal is not being issued due to a failure in the processing device 1, a processing device IK failure occurs to the external alarm device 6. 1) informs the interrupt controller 5 of the above, instructs the interrupt control unit 5 to close the interrupt mask, and returns control to the interrupted program. If it is determined that the interrupt request signal has disappeared normally, one interrupt mask is opened and control is returned to the interrupted program.

上記の様な制御を行なえば、処理装置1に生じた障害に
よって割込要求信号が出し放しKされ次場合でも、処理
装置2は何度も割込処理プロクラムを実行するというプ
ログラムループ状態を生じる事はない。また本方式を用
いれば、処理装置1の演算速度が処理装置2の演算速度
に比較して格段に速く、かつ処理装置1が割込要求処理
終了報告を受は次後即座に別の割込要因による割込要求
信号を発生した場合でも1割込要求信号の消滅を確実t
ic@鐵できる。単に割込要求信号の値を保持する方式
ではこの様な場合の割込要求信号の消滅を認識できる保
障はない。
If the above control is carried out, even if the interrupt request signal is not issued due to a failure occurring in the processing device 1, a program loop state will occur in which the processing device 2 will execute the interrupt processing program many times. There's nothing wrong. Furthermore, if this method is used, the calculation speed of the processing device 1 is much faster than the calculation speed of the processing device 2, and when the processing device 1 receives the interrupt request processing completion report, it immediately executes another interrupt. Even if an interrupt request signal is generated due to a factor, it is ensured that one interrupt request signal disappears.
I can do ic@iron. If the system simply holds the value of the interrupt request signal, there is no guarantee that the disappearance of the interrupt request signal can be recognized in such a case.

第2図は、第1図における割込要求信号監視部401つ
の実施例である。割込要求処理プログラムから割込要求
信号監視部4に監視指示がされるとゲート7を介してフ
リップフロップ9をセットし、出力端子Q、警告表示子
1oがハイレベルとなる。フリップフロップ9の端子り
はデータ入力であり第2図の場合ロウレベルに固定され
ている。T端子はトリガー入力端子でロウレベルからハ
イレベルへの変化の際に7 リップ70ツブ9はD端子
の状態即ちロウレベルを出力端子Qに反映する。従って
監視指示を受けた後1割込要求信号が消滅すると、割込
要求信号はインバータ8で信号破性が反転されてT端子
に与えられ、フリップフロップ9の出力端子Qはロウレ
ベルとなり、警告表示子1oもロウレベルとなる。尚、
フリップフロップ9の端子Rは初期リセット入力である
。この様に構成すれば割込要求信号がオンのi壕である
と警告表示子10はハイレベルのままとなり、割込要求
元の動作が異常であることを検知できる。
FIG. 2 shows one embodiment of the interrupt request signal monitoring section 40 in FIG. 1. When the interrupt request processing program instructs the interrupt request signal monitoring unit 4 to monitor, the flip-flop 9 is set via the gate 7, and the output terminal Q and warning indicator 1o become high level. The terminal of the flip-flop 9 is a data input and is fixed at a low level in the case of FIG. The T terminal is a trigger input terminal, and when changing from low level to high level, the lip 70 knob 9 reflects the state of the D terminal, that is, the low level, to the output terminal Q. Therefore, when the 1st interrupt request signal disappears after receiving a monitoring instruction, the signal failure characteristic of the interrupt request signal is inverted by the inverter 8 and is applied to the T terminal, and the output terminal Q of the flip-flop 9 becomes low level, and a warning is displayed. Child 1o also becomes low level. still,
Terminal R of flip-flop 9 is an initial reset input. With this configuration, when the interrupt request signal is on, the warning indicator 10 remains at a high level, and it is possible to detect that the operation of the interrupt request source is abnormal.

第3図は以上述べた事をタイムチャートで示し友もので
ある。通常割込マスクは開いているものとする。割込制
御部5は割込要求処理プログラム実行中は、同じ要因に
よる割込は抑止するものとする。処理装置2は割込要求
信号が発生すると即座にその時実行していた処理プログ
ラムを中断して割込要求処理プログラムの実行を開始す
る。割込要求処理プログラムはまず割込要求信号監視部
4に監視指示を出す。これKより割込要求信号監視部4
の警告表示子10dハイレベルとなる。その後割込要求
処理プログラムが処理装置IK対して割込要求処理終了
報告を出す。この時、第3図に示す様に割込要求信号が
出し放しにされたとすると、警告表示子10は警告を出
したままKなり割込要求処理グログラムはそれによって
割込マスクを閉じ、外部警報装置6に処理装置7に異常
が発生したことを知らせてから中断し、ていた処理プロ
グラムに制御を返す。処理装R1が正唐ならば点線に示
す如く、割込要求信号が消滅したことにより警告表示子
10けロウレベルとなり、その後再び割込要求処理プロ
グラムによる監視指示がされない限り、ロウレベルを保
ち続ける。
Figure 3 is a time chart that shows what has been described above. It is assumed that the interrupt mask is normally open. It is assumed that the interrupt control unit 5 suppresses interrupts caused by the same cause while the interrupt request processing program is being executed. When the interrupt request signal is generated, the processing device 2 immediately interrupts the processing program being executed at that time and starts executing the interrupt request processing program. The interrupt request processing program first issues a monitoring instruction to the interrupt request signal monitoring section 4. From this K, interrupt request signal monitoring section 4
The warning indicator 10d becomes high level. Thereafter, the interrupt request processing program issues an interrupt request processing completion report to the processing device IK. At this time, if the interrupt request signal is left as shown in FIG. After notifying the device 6 that an abnormality has occurred in the processing device 7, the processing is interrupted and control is returned to the processing program that was being executed. If the processing device R1 is in the correct state, as shown by the dotted line, the warning indicator goes to 10 low level due to the disappearance of the interrupt request signal, and continues to remain at the low level unless a monitoring instruction is given again by the interrupt request processing program.

本方式による割込要求信号の監視を行なえば、処理装#
t1と処理装[2の間の演算速度の差異に関係なく、処
理装W11の障害発生時に処理装置2の割込マスクを閉
じることにより、処理装置2のブログラノ・ループを確
実に防止することが可能である。
If the interrupt request signal is monitored using this method, the processing
Irrespective of the difference in calculation speed between t1 and processor [2], it is possible to reliably prevent a Brograno loop in processor 2 by closing the interrupt mask of processor 2 when a failure occurs in processor W11. It is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の割込要求信号監視方式の実施例の2
つの処理装置と外部警報装置による構成図、第2図は第
1図における割込要求信号監視部の説明図、第6図は、
第1図、第2図の動作の概略例を示すタイミングチャー
トである。 1・・・処理装置1、 2・・・処理装置2.3・・・
割込要求処理プログラム、 4・・・割込要求信号監視部、 5・・・割込制御部、   6・・・外部警報装置。
FIG. 1 shows a second embodiment of the interrupt request signal monitoring system of the present invention.
FIG. 2 is an explanatory diagram of the interrupt request signal monitoring unit in FIG. 1, and FIG.
2 is a timing chart showing a schematic example of the operations shown in FIGS. 1 and 2. FIG. 1... Processing device 1, 2... Processing device 2.3...
Interrupt request processing program, 4... Interrupt request signal monitoring unit, 5... Interrupt control unit, 6... External alarm device.

Claims (1)

【特許請求の範囲】[Claims] 1、 割込処理を用いて他の装置からの要求を処理する
ことが可能ないくつかの処理装置から成るデータ処理シ
ステムにおいて、処理装置の内部あるいは外部に、プロ
グラムで制御可能で、かつ処理装置間の演算実行速度に
依存しない割込要求信号監視部を設けたことにより1割
込要求信号を発行した装置に生じ九障害による処理装置
のプログラムルーズの発生を防止可能とすることを特徴
とするデータ処う、    環システムの割込要求監視
方式。
1. In a data processing system consisting of several processing devices that can process requests from other devices using interrupt processing, there is a processing device that can be controlled by a program and that By providing an interrupt request signal monitoring unit that does not depend on the calculation execution speed between the two, it is possible to prevent program looseness of the processing device due to failures occurring in the device that issued one interrupt request signal. Interrupt request monitoring method for data processing systems.
JP56119058A 1981-07-31 1981-07-31 Interrupt request monitoring method Pending JPS5822459A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56119058A JPS5822459A (en) 1981-07-31 1981-07-31 Interrupt request monitoring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56119058A JPS5822459A (en) 1981-07-31 1981-07-31 Interrupt request monitoring method

Publications (1)

Publication Number Publication Date
JPS5822459A true JPS5822459A (en) 1983-02-09

Family

ID=14751855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56119058A Pending JPS5822459A (en) 1981-07-31 1981-07-31 Interrupt request monitoring method

Country Status (1)

Country Link
JP (1) JPS5822459A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60175156A (en) * 1984-02-20 1985-09-09 Meidensha Electric Mfg Co Ltd Abnormality monitoring system of computer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60175156A (en) * 1984-02-20 1985-09-09 Meidensha Electric Mfg Co Ltd Abnormality monitoring system of computer

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