JPS58109275U - hybrid integrated circuit - Google Patents
hybrid integrated circuitInfo
- Publication number
- JPS58109275U JPS58109275U JP536782U JP536782U JPS58109275U JP S58109275 U JPS58109275 U JP S58109275U JP 536782 U JP536782 U JP 536782U JP 536782 U JP536782 U JP 536782U JP S58109275 U JPS58109275 U JP S58109275U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- conductive paths
- hybrid integrated
- resistor
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例のパターン図、・第２図はこの考案の実
施例に係る混成集積回路のパターン図である。
１０・・・・・・基板、１１． １２． １５． １７
・・・・・・導電路、１３・・・・・・単体部品、１４
．１８・・・・・・膜抵抗、１６・・・・・・ジャンパ
、２０・・・・・・チップ抵抗、メルフ−膜抵抗。FIG. 1 is a pattern diagram of a conventional example, and FIG. 2 is a pattern diagram of a hybrid integrated circuit according to an embodiment of this invention. 10...Substrate, 11. 12. 15. 17
... Conductive path, 13 ... Single component, 14
．． 18... Membrane resistor, 16... Jumper, 20... Chip resistor, Melf-membrane resistor.
Claims (1)
部品間を接続すべく基板上に形成した導電路とを具え、
２つの導電路間に他の１つ又は複数の導電路が介在し且
つ前記２づの導電路を抵抗−を含んで接続するようにし
た混成集積回路において、 前記抵抗をチップ抵抗又はメルフ膜抵抗とし、前記２つ
の導電路間はこの抵抗をもって直接に接続するようにし
て成る混成集積回路。[Claims for Utility Model Registration] Comprising a substrate, parts formed on the substrate, single parts, and conductive paths formed on the substrate to connect each part,
In a hybrid integrated circuit in which one or more other conductive paths are interposed between two conductive paths and the two conductive paths are connected including a resistor, the resistor is a chip resistor or a Melf film resistor. and the two conductive paths are directly connected through this resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP536782U JPS58109275U (en) | 1982-01-19 | 1982-01-19 | hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP536782U JPS58109275U (en) | 1982-01-19 | 1982-01-19 | hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58109275U true JPS58109275U (en) | 1983-07-25 |
Family
ID=30018173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP536782U Pending JPS58109275U (en) | 1982-01-19 | 1982-01-19 | hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58109275U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01119047A (en) * | 1987-10-30 | 1989-05-11 | Nec Corp | Integrated circuit device |
-
1982
- 1982-01-19 JP JP536782U patent/JPS58109275U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01119047A (en) * | 1987-10-30 | 1989-05-11 | Nec Corp | Integrated circuit device |
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