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JPS5771596A - Nonolithic memory chip provided with correcting function - Google Patents

Nonolithic memory chip provided with correcting function

Info

Publication number
JPS5771596A
JPS5771596A JP55146548A JP14654880A JPS5771596A JP S5771596 A JPS5771596 A JP S5771596A JP 55146548 A JP55146548 A JP 55146548A JP 14654880 A JP14654880 A JP 14654880A JP S5771596 A JPS5771596 A JP S5771596A
Authority
JP
Japan
Prior art keywords
register
data
correcting
output
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55146548A
Other languages
Japanese (ja)
Inventor
Moriyuki Takamura
Susumu Okazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55146548A priority Critical patent/JPS5771596A/en
Publication of JPS5771596A publication Critical patent/JPS5771596A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To output a corrected data to the outside of a chip, and also to rewrite the corrected data to a call, by correcting an error through making a cell belonging to a row line a checking block. CONSTITUTION:For instance, in case when a row line 221 has been activated, a cell of a cell matrix 1 belonging to the line 221, and all cells of a matrix 4 for a check bit are read out and are stored in a data register 5 and a check bit register 9. An output 250-n of the register 5 is inputted to a correcting register 6 and a syndrome generator 10. In the generator 10, a syndrome is generated and is inputted to a correcting circuit 11. An output 280-k of the circuit 11 is inputted to the register 6 and a check bit correcting register 12. In the register 6, for instance, if a (j) bit is an error, an error data 25j is inverted, and is stored in the register 6. An output of the register 6 passes through a mixture store register 7, and in a data outport one bit is outputted to the outside of a chip, and a correct answer data is written.
JP55146548A 1980-10-20 1980-10-20 Nonolithic memory chip provided with correcting function Pending JPS5771596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55146548A JPS5771596A (en) 1980-10-20 1980-10-20 Nonolithic memory chip provided with correcting function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55146548A JPS5771596A (en) 1980-10-20 1980-10-20 Nonolithic memory chip provided with correcting function

Publications (1)

Publication Number Publication Date
JPS5771596A true JPS5771596A (en) 1982-05-04

Family

ID=15410144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55146548A Pending JPS5771596A (en) 1980-10-20 1980-10-20 Nonolithic memory chip provided with correcting function

Country Status (1)

Country Link
JP (1) JPS5771596A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5898899A (en) * 1981-12-08 1983-06-11 Toshiba Corp Semiconductor memory
JPS6046000A (en) * 1983-08-23 1985-03-12 Nec Corp Programmable read-only memory having bit correction
JPS60133599A (en) * 1983-12-21 1985-07-16 Nec Corp Semiconductor memory device
JPS60163300A (en) * 1984-02-06 1985-08-26 Hitachi Ltd Semiconductor memory having error correcting function
EP0153752A2 (en) * 1984-03-01 1985-09-04 Kabushiki Kaisha Toshiba Semiconductor memory device with a bit error detecting function
JPS6162954A (en) * 1984-02-21 1986-03-31 サンジヤイ メ−ロトラ Error inspection and correction circuit used together with electrically programmable and electrically erasable memory array
JPS623498A (en) * 1985-06-28 1987-01-09 Mitsubishi Electric Corp Semiconductor memory device with on-chip ecc circuit
JPS63285800A (en) * 1987-05-19 1988-11-22 Fujitsu Ltd Semiconductor memory device
JPH01128298A (en) * 1987-11-12 1989-05-19 Mitsubishi Electric Corp Semiconductor memory device
JPH04222999A (en) * 1990-04-16 1992-08-12 Internatl Business Mach Corp <Ibm> On-chip ecc system
JPH0689595A (en) * 1990-02-13 1994-03-29 Internatl Business Mach Corp <Ibm> Dynamic random access memory having on-chip ecc and optimized bit and redundancy constitution of word
JPH07169297A (en) * 1994-11-18 1995-07-04 Mitsubishi Electric Corp Semiconductor memory

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5898899A (en) * 1981-12-08 1983-06-11 Toshiba Corp Semiconductor memory
JPS6046000A (en) * 1983-08-23 1985-03-12 Nec Corp Programmable read-only memory having bit correction
JPS60133599A (en) * 1983-12-21 1985-07-16 Nec Corp Semiconductor memory device
JPS60163300A (en) * 1984-02-06 1985-08-26 Hitachi Ltd Semiconductor memory having error correcting function
JPS6162954A (en) * 1984-02-21 1986-03-31 サンジヤイ メ−ロトラ Error inspection and correction circuit used together with electrically programmable and electrically erasable memory array
EP0153752A2 (en) * 1984-03-01 1985-09-04 Kabushiki Kaisha Toshiba Semiconductor memory device with a bit error detecting function
JPS623498A (en) * 1985-06-28 1987-01-09 Mitsubishi Electric Corp Semiconductor memory device with on-chip ecc circuit
JPS63285800A (en) * 1987-05-19 1988-11-22 Fujitsu Ltd Semiconductor memory device
JPH01128298A (en) * 1987-11-12 1989-05-19 Mitsubishi Electric Corp Semiconductor memory device
JPH0689595A (en) * 1990-02-13 1994-03-29 Internatl Business Mach Corp <Ibm> Dynamic random access memory having on-chip ecc and optimized bit and redundancy constitution of word
JPH04222999A (en) * 1990-04-16 1992-08-12 Internatl Business Mach Corp <Ibm> On-chip ecc system
JPH07169297A (en) * 1994-11-18 1995-07-04 Mitsubishi Electric Corp Semiconductor memory

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