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JPS5760508A - Signal processor for pcm signal - Google Patents

Signal processor for pcm signal

Info

Publication number
JPS5760508A
JPS5760508A JP55133829A JP13382980A JPS5760508A JP S5760508 A JPS5760508 A JP S5760508A JP 55133829 A JP55133829 A JP 55133829A JP 13382980 A JP13382980 A JP 13382980A JP S5760508 A JPS5760508 A JP S5760508A
Authority
JP
Japan
Prior art keywords
output data
signal
input data
input
signal processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55133829A
Other languages
Japanese (ja)
Inventor
Chitoshi Hibino
Masaharu Kobayashi
Shigeru Yamazaki
Takao Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Hitachi Ltd
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Victor Company of Japan Ltd, Nippon Victor KK filed Critical Hitachi Ltd
Priority to JP55133829A priority Critical patent/JPS5760508A/en
Publication of JPS5760508A publication Critical patent/JPS5760508A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1806—Pulse code modulation systems for audio signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To perform excellent signal processing without malfunction, even if the transfer rate of input and output data is different, by alternate write-in and readout operations of two systems of memories. CONSTITUTION:Since the write-in of an input data 1 to a memory 29 can be made from around the start of the next horizontal synchronizing period with synchronized state to the output data master block via auxiliary memories 8, 9, even if the length of the horizontal synchronizing section is reduced because of missing of signals and skew, the signal processing can be made with sufficient time margin. This, the transfer route of the input data 1 and output data can arbitrarily be set and the processing as to correction can be made in synchronizing with the output data master block, allowing to reduce the production of malfunction even with variation in the transfer route of the input data 1.
JP55133829A 1980-09-26 1980-09-26 Signal processor for pcm signal Pending JPS5760508A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55133829A JPS5760508A (en) 1980-09-26 1980-09-26 Signal processor for pcm signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55133829A JPS5760508A (en) 1980-09-26 1980-09-26 Signal processor for pcm signal

Publications (1)

Publication Number Publication Date
JPS5760508A true JPS5760508A (en) 1982-04-12

Family

ID=15114009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55133829A Pending JPS5760508A (en) 1980-09-26 1980-09-26 Signal processor for pcm signal

Country Status (1)

Country Link
JP (1) JPS5760508A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252236A (en) * 1986-04-25 1987-11-04 Nec Corp Asynchronous type correction circuit
JPS6454949A (en) * 1987-08-26 1989-03-02 Nec Corp Data signal speed converting circuit
JPH0282135U (en) * 1988-12-14 1990-06-25

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466815A (en) * 1977-07-14 1979-05-29 Indep Broadcasting Authority Digital signal recorder*reproducer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466815A (en) * 1977-07-14 1979-05-29 Indep Broadcasting Authority Digital signal recorder*reproducer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252236A (en) * 1986-04-25 1987-11-04 Nec Corp Asynchronous type correction circuit
JPS6454949A (en) * 1987-08-26 1989-03-02 Nec Corp Data signal speed converting circuit
JPH0282135U (en) * 1988-12-14 1990-06-25

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