[go: up one dir, main page]

JPS5760441A - Information processing equipment - Google Patents

Information processing equipment

Info

Publication number
JPS5760441A
JPS5760441A JP55136242A JP13624280A JPS5760441A JP S5760441 A JPS5760441 A JP S5760441A JP 55136242 A JP55136242 A JP 55136242A JP 13624280 A JP13624280 A JP 13624280A JP S5760441 A JPS5760441 A JP S5760441A
Authority
JP
Japan
Prior art keywords
instruction
flag
decoding
executed
result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55136242A
Other languages
Japanese (ja)
Other versions
JPS6244661B2 (en
Inventor
Takao Kato
Hirosada Tone
Yoshihiro Mizushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55136242A priority Critical patent/JPS5760441A/en
Publication of JPS5760441A publication Critical patent/JPS5760441A/en
Publication of JPS6244661B2 publication Critical patent/JPS6244661B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To advance the start time for decoding an instruction as early as possible, and to improve a mean instruction executing speed, by providing an existence indicating flag of a read-out data byte on a read-out register, in an information processing equipment for handling a variable-length instruction. CONSTITUTION:When executing a branch instruction, a branch destination address is accessed, and as a result, if at least one flag, F1 is set, a byte corresponding to its flag is provided to a decoder 11 through a selecting circuit 9. As a result of its decoding, it its instruction is of 2 byte length, the instruction is executed as its is, and when the next memory access is executed by keeping pace with execution of the instruction, the instruction is not interrupted but is executed. As a result of said decoding, if the instruction has proved to be of 4 bytes or more, the next flag to be set is further awaited.
JP55136242A 1980-09-30 1980-09-30 Information processing equipment Granted JPS5760441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55136242A JPS5760441A (en) 1980-09-30 1980-09-30 Information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55136242A JPS5760441A (en) 1980-09-30 1980-09-30 Information processing equipment

Publications (2)

Publication Number Publication Date
JPS5760441A true JPS5760441A (en) 1982-04-12
JPS6244661B2 JPS6244661B2 (en) 1987-09-22

Family

ID=15170602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55136242A Granted JPS5760441A (en) 1980-09-30 1980-09-30 Information processing equipment

Country Status (1)

Country Link
JP (1) JPS5760441A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6075407U (en) * 1983-10-26 1985-05-27 グンゼ株式会社 brazier
JPS6133545A (en) * 1984-07-26 1986-02-17 Nec Corp Data processor
JPS61155308U (en) * 1985-03-19 1986-09-26
JPS62145430A (en) * 1985-12-20 1987-06-29 Nec Corp Data processor
JPS6324327A (en) * 1986-07-16 1988-02-01 Fujitsu Ltd Instruction fetch processing method
JPH061441B2 (en) * 1983-09-12 1994-01-05 モトロ−ラ・インコ−ポレ−テツド Preliminary confirmation device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS509621A (en) * 1973-04-12 1975-01-31

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS509621A (en) * 1973-04-12 1975-01-31

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH061441B2 (en) * 1983-09-12 1994-01-05 モトロ−ラ・インコ−ポレ−テツド Preliminary confirmation device
JPS6075407U (en) * 1983-10-26 1985-05-27 グンゼ株式会社 brazier
JPS6336010Y2 (en) * 1983-10-26 1988-09-26
JPS6133545A (en) * 1984-07-26 1986-02-17 Nec Corp Data processor
JPS61155308U (en) * 1985-03-19 1986-09-26
JPS62145430A (en) * 1985-12-20 1987-06-29 Nec Corp Data processor
JPS6324327A (en) * 1986-07-16 1988-02-01 Fujitsu Ltd Instruction fetch processing method

Also Published As

Publication number Publication date
JPS6244661B2 (en) 1987-09-22

Similar Documents

Publication Publication Date Title
JPS5387640A (en) Data processing unit
JPS5725069A (en) Vector data processing equipment
ES464418A1 (en) Data processing system with improved bit field handling
JPS5760441A (en) Information processing equipment
JPS54122043A (en) Electronic computer
JPS5464439A (en) Address designation system
JPS55154635A (en) Data processor
JPS55119747A (en) Microprogram control unit
JPS5394133A (en) Data converter
JPS53113446A (en) Information processor and its method
JPS5729152A (en) Information processor prefetching instruction
JPS5212536A (en) Buffer memory control system
JPS52133734A (en) Data processing unit
JPS5543680A (en) Address designation system
JPS5687142A (en) Sequence control system for rom address
JPS56137447A (en) Information processor
JPS5448459A (en) Control unit of instruction advance fetch
JPS5617438A (en) Program sequencer
JPS5671141A (en) Instruction word read control system
JPS5566028A (en) Information processing unit
JPS5737795A (en) Read-only memory element
JPS5734253A (en) Brunch instruction controlling circuit
JPS5694444A (en) Information processing device
JPS54122042A (en) Electronic computer
JPS56117400A (en) Buffer memory control system