JPS5755460A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS5755460A JPS5755460A JP55129213A JP12921380A JPS5755460A JP S5755460 A JPS5755460 A JP S5755460A JP 55129213 A JP55129213 A JP 55129213A JP 12921380 A JP12921380 A JP 12921380A JP S5755460 A JPS5755460 A JP S5755460A
- Authority
- JP
- Japan
- Prior art keywords
- program
- address
- content
- storage device
- execution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To prevent program from runaway, by detecting if the content of a program counter performing the designation of address of a storage device is an even or odd number, and discriminating that the execution program is in error if the content is an odd number. CONSTITUTION:The instruction word system is constituted by taking the number of bits being a multiple of an even number of bit number constituting the content of the minimum unit of the address for the storage device as the word. An operation controller 1 reads out a program from the address of a main storage device designated for the address at a program counter 2 for sequential execution. When the program is executed normally, the output of an OR gate is zero, but if a program error takes place, 1 is applied from the least significant bit of the program counter 2, the output of the OR gate 5 is at 1, and it is applied to an interruption signal generating circuit 3, and the operating controller 1 rewrites the content of the program counter 2 to the designated address of the monitor program and interrupts the execution of the processing program.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55129213A JPS5755460A (en) | 1980-09-19 | 1980-09-19 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55129213A JPS5755460A (en) | 1980-09-19 | 1980-09-19 | Information processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5755460A true JPS5755460A (en) | 1982-04-02 |
Family
ID=15003925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55129213A Pending JPS5755460A (en) | 1980-09-19 | 1980-09-19 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5755460A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4875156A (en) * | 1986-03-05 | 1989-10-17 | Oki Electric Industry Co., Ltd. | Computer having a protection device to selectively block incorrect control signals |
-
1980
- 1980-09-19 JP JP55129213A patent/JPS5755460A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4875156A (en) * | 1986-03-05 | 1989-10-17 | Oki Electric Industry Co., Ltd. | Computer having a protection device to selectively block incorrect control signals |
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