JPS5749222A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5749222A JPS5749222A JP12559580A JP12559580A JPS5749222A JP S5749222 A JPS5749222 A JP S5749222A JP 12559580 A JP12559580 A JP 12559580A JP 12559580 A JP12559580 A JP 12559580A JP S5749222 A JPS5749222 A JP S5749222A
- Authority
- JP
- Japan
- Prior art keywords
- region
- impurity
- substrate
- diffused
- conductive type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000012535 impurity Substances 0.000 abstract 8
- 239000000758 substrate Substances 0.000 abstract 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
PURPOSE:To diffuse impurity in a part of a semiconductor substrate and to enable clear identification of the diffused region from other regions by employing polycrystalline Si containing impurity as a diffusion source. CONSTITUTION:An SiO2 film 2 is covered on the surface of an Si substrate 1, a hole is opened at a region to be diffused with impurity, and a polycrystalline Si layer 8 containing impurity is accumulated on the overall surface including the hole. The impurity may employ impurity of the same conductive type as the substrate 1 when the density of the diffused region 41 is desirably increased higher than the substrate 1, and may employ impurity to reversely conductive type when the region of reversely conductive type is desirably obtained. Thereafter, it is heat treated to convert the layer 8 into an SiO2 film 21, the impurity is diffused from the film 22 invaded into the substrate 1 exposed in the hole simultaneously to form a region 41. Subsequently, all the SiO2 films are removed, the substrate 1 having uneven surface on the region 41 is obtained, stepwise part 9 corresponding to the region 41 is also produced on the single crystalline Si layer 7 grown in gas phase on the substrate, and the existing position of the region 41 can be clearly obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12559580A JPS5749222A (en) | 1980-09-09 | 1980-09-09 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12559580A JPS5749222A (en) | 1980-09-09 | 1980-09-09 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5749222A true JPS5749222A (en) | 1982-03-23 |
Family
ID=14914033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12559580A Pending JPS5749222A (en) | 1980-09-09 | 1980-09-09 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5749222A (en) |
-
1980
- 1980-09-09 JP JP12559580A patent/JPS5749222A/en active Pending
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