JPS5746594A - Channel board used as mdf - Google Patents
Channel board used as mdfInfo
- Publication number
- JPS5746594A JPS5746594A JP12172480A JP12172480A JPS5746594A JP S5746594 A JPS5746594 A JP S5746594A JP 12172480 A JP12172480 A JP 12172480A JP 12172480 A JP12172480 A JP 12172480A JP S5746594 A JPS5746594 A JP S5746594A
- Authority
- JP
- Japan
- Prior art keywords
- interface circuit
- lines
- line interface
- line
- channel board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011159 matrix material Substances 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/02—Constructional details
- H04Q1/14—Distribution frames
- H04Q1/145—Distribution frames with switches arranged in a matrix configuration
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Interface Circuits In Exchanges (AREA)
- Structure Of Telephone Exchanges (AREA)
Abstract
PURPOSE:To simplify line opening and test, by arranging time division multiple lines and timing signal lines in a matrix and by providing a connecting means at each intersection to store a line interface circuit. CONSTITUTION:Time division multiple lines 0-m in the logitudinal dirdction and timing signal lines 0-n from a timing circuit T for signal supply which indicate signal positions on multiple lines in the transverse direction are arranged in a matrix, and connecting means for a service line, a power source, a call signal, and various control lines which a line interface circuit requires is arranged at intersections to constitute a channel board SPB. Line opening and transfer are performed by attaching and detaching a subscriber's circuit or the line interface circuit correspondingly to connector terminals of the channel board SPB. If the line interface circuit is provided with a receiving terminal for test, the test operation is simplified.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12172480A JPS598115B2 (en) | 1980-09-04 | 1980-09-04 | MDF dual use communication base |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12172480A JPS598115B2 (en) | 1980-09-04 | 1980-09-04 | MDF dual use communication base |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5746594A true JPS5746594A (en) | 1982-03-17 |
JPS598115B2 JPS598115B2 (en) | 1984-02-22 |
Family
ID=14818305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12172480A Expired JPS598115B2 (en) | 1980-09-04 | 1980-09-04 | MDF dual use communication base |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS598115B2 (en) |
-
1980
- 1980-09-04 JP JP12172480A patent/JPS598115B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS598115B2 (en) | 1984-02-22 |
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