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JPS5745944A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5745944A
JPS5745944A JP55121398A JP12139880A JPS5745944A JP S5745944 A JPS5745944 A JP S5745944A JP 55121398 A JP55121398 A JP 55121398A JP 12139880 A JP12139880 A JP 12139880A JP S5745944 A JPS5745944 A JP S5745944A
Authority
JP
Japan
Prior art keywords
test
pin
circuit
function
function circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55121398A
Other languages
Japanese (ja)
Other versions
JPS6222432B2 (en
Inventor
Soichi Kawasaki
Soichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55121398A priority Critical patent/JPS5745944A/en
Publication of JPS5745944A publication Critical patent/JPS5745944A/en
Publication of JPS6222432B2 publication Critical patent/JPS6222432B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To enable the evaluation test for the characteristics of a function circuit by using a plurality of input pins of the function circuit and an input pin for originally necessary initial reset for an IC also as the input pin of a test signal. CONSTITUTION:A reset signal is applied to a pin T1R in synchronism with the energization of a power source, a latch circuit 14 is reset, a decoder 15 selects a normal mode, its output is suplied through a gate 16 to a function circuit 17, and an original operation is performed. On the other hand, a gate 12 delivers a pulse at the time of completing the counting in a timer 11, the inputs of the pin I1-In are stored in a latch circuit 14, are decoded by a decoder 15 to select a test mode, and a corresponding signal is applied from a testing circuit 18 to the function circuit 17 to perform the evaluation test for the characteristics of a function block. When a reset signal is applied again to the pin T1R at the time of completing the test, the function test 17 is set to normal mode until the timer 11 again completes the prescribed counting. With this configuration, the evaluation test for the characteristics of the function circuit 17 can be performed without any pin exclusive for the test.
JP55121398A 1980-09-02 1980-09-02 Semiconductor integrated circuit device Granted JPS5745944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121398A JPS5745944A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121398A JPS5745944A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5745944A true JPS5745944A (en) 1982-03-16
JPS6222432B2 JPS6222432B2 (en) 1987-05-18

Family

ID=14810195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121398A Granted JPS5745944A (en) 1980-09-02 1980-09-02 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5745944A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0247575A (en) * 1988-07-18 1990-02-16 Samsung Electron Co Ltd Programmable sequence code recognition circuit
JP2005522150A (en) * 2002-04-03 2005-07-21 トムソン　ライセンシング　ソシエテ　アノニム Digital visual interface receiver integrated circuit power-on detection

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0247575A (en) * 1988-07-18 1990-02-16 Samsung Electron Co Ltd Programmable sequence code recognition circuit
JP2005522150A (en) * 2002-04-03 2005-07-21 トムソン　ライセンシング　ソシエテ　アノニム Digital visual interface receiver integrated circuit power-on detection

Also Published As

Publication number Publication date
JPS6222432B2 (en) 1987-05-18

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