JPS5745941A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS5745941A JPS5745941A JP55121395A JP12139580A JPS5745941A JP S5745941 A JPS5745941 A JP S5745941A JP 55121395 A JP55121395 A JP 55121395A JP 12139580 A JP12139580 A JP 12139580A JP S5745941 A JPS5745941 A JP S5745941A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- pin
- test
- decoder
- pins
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To obtain an IC device which can evaluate the characteristics of a function circuit without using any pins exclusive for a test. CONSTITUTION:When a signal ''1'' is applied to a pin T1R in synchronism with the energization of a power source, a latch circuit 16 is reset, and produced an output ''0''. At this time a decoder 17 produces a signal ''1'', a function circuit 19 is set through an OR gate 18 to a normal mode, and an IC is ordinarily operated. When a pulse having a frequency larger than a pin Ia is applied to a pin Ib in this state, a binary counter 14 repeates ''0'' or ''1'', the latch circuit 16 stores the counted value, the signal ''1'' of the decoder 17 is fed to and resets the binary counter 14 via the gate 15, and the signals of the pins Ia, Ib can be used for the input signal. When a pulse signal of high frequency is applied to the pin Ia, the decorder selects a test mode, a function circuit 19 will dispatch a signal with this output, and performs the characteristic test of the corresponding function block. When the signal is again applied to the pin T1R, it returns to the normal mode, and no pin exclusive for the test is necessary.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55121395A JPS5745941A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55121395A JPS5745941A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5745941A true JPS5745941A (en) | 1982-03-16 |
Family
ID=14810126
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55121395A Pending JPS5745941A (en) | 1980-09-02 | 1980-09-02 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5745941A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6438674A (en) * | 1987-08-04 | 1989-02-08 | Nippon Electric Ic Microcomput | Semiconductor integrated circuit |
US6378034B1 (en) | 1998-10-09 | 2002-04-23 | Nec Corporation | Microcomputer with flash EEPROM having automatic communication mode determining function |
-
1980
- 1980-09-02 JP JP55121395A patent/JPS5745941A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6438674A (en) * | 1987-08-04 | 1989-02-08 | Nippon Electric Ic Microcomput | Semiconductor integrated circuit |
US6378034B1 (en) | 1998-10-09 | 2002-04-23 | Nec Corporation | Microcomputer with flash EEPROM having automatic communication mode determining function |
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