JPS5740923A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5740923A JPS5740923A JP11591880A JP11591880A JPS5740923A JP S5740923 A JPS5740923 A JP S5740923A JP 11591880 A JP11591880 A JP 11591880A JP 11591880 A JP11591880 A JP 11591880A JP S5740923 A JPS5740923 A JP S5740923A
- Authority
- JP
- Japan
- Prior art keywords
- type region
- alloy
- alloy foil
- come
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000000956 alloy Substances 0.000 abstract 8
- 229910045601 alloy Inorganic materials 0.000 abstract 8
- 239000011888 foil Substances 0.000 abstract 5
- 229910006351 Si—Sb Inorganic materials 0.000 abstract 3
- 230000005496 eutectics Effects 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 238000005219 brazing Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 abstract 1
- 239000002344 surface layer Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electrodes Of Semiconductors (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than the eutectic temperature of the alloy foil. CONSTITUTION:After P type region 2 is provided on the main face of the substrate 1, the alloy foil 10 of Au-Si-Sb is made to come in contact with an electrode setting region of the N type region. The alloy foil contains 11-17% of Si, 1-5% of Sb, and forms an eutectic. Then a buffer plate 6' is brazed to the P type region. Because the brazing temperature is 1,000 deg.C, the alloy foil of Au-Si-Sb being made to come in contact with the N type region can form together an alloy with the surface layer of the N type region. Accordingly the process can be abbreviated, and the uniform alloy layer can be formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11591880A JPS5740923A (en) | 1980-08-25 | 1980-08-25 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11591880A JPS5740923A (en) | 1980-08-25 | 1980-08-25 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5740923A true JPS5740923A (en) | 1982-03-06 |
Family
ID=14674427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11591880A Pending JPS5740923A (en) | 1980-08-25 | 1980-08-25 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5740923A (en) |
-
1980
- 1980-08-25 JP JP11591880A patent/JPS5740923A/en active Pending
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