[go: up one dir, main page]

JPS5723130A - Interface control system - Google Patents

Interface control system

Info

Publication number
JPS5723130A
JPS5723130A JP9807180A JP9807180A JPS5723130A JP S5723130 A JPS5723130 A JP S5723130A JP 9807180 A JP9807180 A JP 9807180A JP 9807180 A JP9807180 A JP 9807180A JP S5723130 A JPS5723130 A JP S5723130A
Authority
JP
Japan
Prior art keywords
signals
received
control circuit
interface control
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9807180A
Other languages
Japanese (ja)
Inventor
Masaharu Nomoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9807180A priority Critical patent/JPS5723130A/en
Publication of JPS5723130A publication Critical patent/JPS5723130A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To obtain an interface control system of simple circuit constitution, by storing transmitted information and received information in time series by an interface control circuit and by controlling input and output devices while comparing received signals from input and output devices with the received information. CONSTITUTION:Multiplexer circuits 9-1 and 9-2 send sent signals 5-1 and 5-2 to an interface circuit 8, respectively. Input and output devices, having received those sent signals, transmit received signals 1-1 and 1-2 corresponding to the sent signals, and they are returned to an interface control circuit 7' in the opposite cource to the sent signals. Those received signals 1-1 and 1-2 are compared with the contents of multiplexer circuits 9-3 and 9-4, stored with the received information, respectively, by a comparing circuit 10, whose result is transferred to a control circuit 6. On the basis of the result, the control circuit 6 drives the multiplexer circuits 9-1-9-4.
JP9807180A 1980-07-17 1980-07-17 Interface control system Pending JPS5723130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9807180A JPS5723130A (en) 1980-07-17 1980-07-17 Interface control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9807180A JPS5723130A (en) 1980-07-17 1980-07-17 Interface control system

Publications (1)

Publication Number Publication Date
JPS5723130A true JPS5723130A (en) 1982-02-06

Family

ID=14210105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9807180A Pending JPS5723130A (en) 1980-07-17 1980-07-17 Interface control system

Country Status (1)

Country Link
JP (1) JPS5723130A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231723A (en) * 1985-07-31 1987-02-10 Toyoda Gosei Co Ltd Boot for machine shaft coupling
JPS63139328U (en) * 1987-03-04 1988-09-13
JPH01135231U (en) * 1988-03-09 1989-09-14
JPH01168019U (en) * 1988-05-17 1989-11-27

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231723A (en) * 1985-07-31 1987-02-10 Toyoda Gosei Co Ltd Boot for machine shaft coupling
JPS63139328U (en) * 1987-03-04 1988-09-13
JPH01135231U (en) * 1988-03-09 1989-09-14
JPH01168019U (en) * 1988-05-17 1989-11-27

Similar Documents

Publication Publication Date Title
EP0292099A3 (en) Clock scheme for vlsi systems
JPS56146147A (en) Copying machine provided with gathering device
EP0111262A3 (en) Output multiplexer having one gate delay
JPS5723130A (en) Interface control system
JPS57210748A (en) Data transmission system
JPS5592094A (en) Voice data simultaneous transmission system
JPS57183154A (en) Multispeed transmission system
JPS57141741A (en) Input and output control system
JPS5785128A (en) Multiplexer channel
JPS5794824A (en) Data processing system having bus converter
JPS56164429A (en) Cue system for multiplex synchronizing operation
JPS5745649A (en) Asynchronizing signal synchronizer
JPS54114140A (en) Delay control system for input/output control device
JPS5685955A (en) Control signal transfer system
JPS5526766A (en) Terminal-circuit-side transmitter circuit of repeater
JPS56143033A (en) Input and output interface system
JPS57133742A (en) Communication controller
JPS57101926A (en) Data transferring circuit
JPS5361931A (en) Communication control device
JPS56114026A (en) Data processor
JPS5321512A (en) Multiplex transmission system
JPS5313818A (en) Signal transmission system
JPS5497301A (en) Signal transmission system
JPS56106451A (en) Multiplication/isolation circuit
JPS5755446A (en) Check system for digital transfer data