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JPS57170539A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57170539A
JPS57170539A JP5605681A JP5605681A JPS57170539A JP S57170539 A JPS57170539 A JP S57170539A JP 5605681 A JP5605681 A JP 5605681A JP 5605681 A JP5605681 A JP 5605681A JP S57170539 A JPS57170539 A JP S57170539A
Authority
JP
Japan
Prior art keywords
film
wafers
approx
sio2
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5605681A
Other languages
Japanese (ja)
Inventor
Yoshito Ichinose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5605681A priority Critical patent/JPS57170539A/en
Publication of JPS57170539A publication Critical patent/JPS57170539A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent a wafer from warpage and to eliminate an automatic doping during a wafer processing by forming a laminated protective film of SiO2 and Si3N4 initially on the back surface of the wafer processing, thereby balancing stresses irrespective of the state of the back surface. CONSTITUTION:Two wafers 1 in which the front surface is formed in a mirror state and the back surface is formed with relatively ruggedness are matched on the mirror surfaces and are intimately contacted, and a set of two wafers are filled in a treating furnace which contains O2 of high moisture while exposing the back surfaces. Then, the furnace is pressurized to treat the wafers at 1,000 deg.C for approx 1hr, thereby producing a thick SiO2 film 2 having a thickness of 2- 3mum, the wafers are then removed from the furnace, and an Si3N4 film 4 having a thickness of approx. 0.5-1mum is accumulated by a gas phase growth method on the film 2. Thereafter, the set of the wafers are isolated, and when an SiO2 film 3 of approx. 1,000Angstrom is formed on the surface upon formation of the film 2, this film is removed, a buried layer 5 is diffused and formed on the surface of the wafer 1, an epitaxial layer 6 is grown, the layer 6 is then insularly formed with a field SiO2 film 7, and an element 8 is formed thereon.
JP5605681A 1981-04-13 1981-04-13 Manufacture of semiconductor device Pending JPS57170539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5605681A JPS57170539A (en) 1981-04-13 1981-04-13 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5605681A JPS57170539A (en) 1981-04-13 1981-04-13 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57170539A true JPS57170539A (en) 1982-10-20

Family

ID=13016418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5605681A Pending JPS57170539A (en) 1981-04-13 1981-04-13 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57170539A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2744566A1 (en) * 1996-02-02 1997-08-08 Mitsubishi Electric Corp SEMICONDUCTOR DEVICE COMPRISING TWO ELEMENTARY DEVICES AND METHOD OF MANUFACTURE
US5780311A (en) * 1992-06-17 1998-07-14 Harris Corporation bonded wafer processing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244169A (en) * 1975-10-06 1977-04-06 Hitachi Ltd Process for production of semiconductor device
JPS5261956A (en) * 1975-11-18 1977-05-21 Fujitsu Ltd Production of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244169A (en) * 1975-10-06 1977-04-06 Hitachi Ltd Process for production of semiconductor device
JPS5261956A (en) * 1975-11-18 1977-05-21 Fujitsu Ltd Production of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5780311A (en) * 1992-06-17 1998-07-14 Harris Corporation bonded wafer processing
US5801084A (en) * 1992-06-17 1998-09-01 Harris Corporation Bonded wafer processing
FR2744566A1 (en) * 1996-02-02 1997-08-08 Mitsubishi Electric Corp SEMICONDUCTOR DEVICE COMPRISING TWO ELEMENTARY DEVICES AND METHOD OF MANUFACTURE

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