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JPS57162830A - Schmitt trigger circuit - Google Patents

Schmitt trigger circuit

Info

Publication number
JPS57162830A
JPS57162830A JP4908881A JP4908881A JPS57162830A JP S57162830 A JPS57162830 A JP S57162830A JP 4908881 A JP4908881 A JP 4908881A JP 4908881 A JP4908881 A JP 4908881A JP S57162830 A JPS57162830 A JP S57162830A
Authority
JP
Japan
Prior art keywords
mosfets
fet
low
output voltage
vin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4908881A
Other languages
Japanese (ja)
Inventor
Masaru Uya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4908881A priority Critical patent/JPS57162830A/en
Publication of JPS57162830A publication Critical patent/JPS57162830A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To increase the width of hysteresis, by cascade connection of two stages of CMOS inverters and connecting a series circuit between an FET to which an input voltage is applied and an FET to which an output voltage is applied, in parallel with one FET of the first stage inverter. CONSTITUTION:An input signal VIN is applied to an inverter consisting of MOSFETs P1 and N1, and the output signal is applied to an inverter consisting of MOSFETs P4 and N2. The input voltage VIN is applied to the gate of a MOSFET P2 through a series circuit connection of MOSFETs P2 and P3 to the MOSFETP1, and an output voltage VOUT is applied to the gate of the MOSFETP3. When the input voltage VIN is at a low level, the output voltage VOUT is also at a low level, the MOSFETs P2 and P3 are conductive, the synthetic impedance of the MOSFETs P1, P2 and P3 is low and the threshold voltage when transition is made from low to high level, is increased.
JP4908881A 1981-03-31 1981-03-31 Schmitt trigger circuit Pending JPS57162830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4908881A JPS57162830A (en) 1981-03-31 1981-03-31 Schmitt trigger circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4908881A JPS57162830A (en) 1981-03-31 1981-03-31 Schmitt trigger circuit

Publications (1)

Publication Number Publication Date
JPS57162830A true JPS57162830A (en) 1982-10-06

Family

ID=12821335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4908881A Pending JPS57162830A (en) 1981-03-31 1981-03-31 Schmitt trigger circuit

Country Status (1)

Country Link
JP (1) JPS57162830A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122218A (en) * 1982-12-28 1984-07-14 Nippon Texas Instr Kk Hysteresis circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5694827A (en) * 1979-12-27 1981-07-31 Seiko Epson Corp Cmos schmitt trigger circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5694827A (en) * 1979-12-27 1981-07-31 Seiko Epson Corp Cmos schmitt trigger circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122218A (en) * 1982-12-28 1984-07-14 Nippon Texas Instr Kk Hysteresis circuit

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