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JPS57162432A - Mound crushing unit - Google Patents

Mound crushing unit

Info

Publication number
JPS57162432A
JPS57162432A JP4801581A JP4801581A JPS57162432A JP S57162432 A JPS57162432 A JP S57162432A JP 4801581 A JP4801581 A JP 4801581A JP 4801581 A JP4801581 A JP 4801581A JP S57162432 A JPS57162432 A JP S57162432A
Authority
JP
Japan
Prior art keywords
wafer
board
block
mound
air
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4801581A
Other languages
Japanese (ja)
Inventor
Tatsuhiko Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4801581A priority Critical patent/JPS57162432A/en
Publication of JPS57162432A publication Critical patent/JPS57162432A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To crush mounds on a wafer surface with speed and certainly by a method wherein a mound crushing board is positioned facing a wafer supporting block and the block is caused to travel a prescribed distance toward the board. CONSTITUTION:An Si wafer 10 is mounted on a supporting block 11 and is attracted by a vacuum adsorber 11b to a surface 11a. A mechanism 12 is supplied with compressed air and pushes up the block 11 so the wafer surface abuts against the board 13 supported by a ball joint 14. The board 13 abutting against the entire surface of the wafer 10, mound crushing all over the wafer 10 is ensured. Then, air is bled out of the mechanism 12, air is spouted from a hole 13a to ensure the separation of the wafer 10 from the board 13, and then the block 11 comes down to the original position. Next, the adsorber 11b stops functioning and then the wafer 10 is taken out. For a wafer of different thickness, an adjusting knob 16 is operated to obtain a suitable, constant pressure. This setup results in a rapid, sure, and uniform treatment.
JP4801581A 1981-03-31 1981-03-31 Mound crushing unit Pending JPS57162432A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4801581A JPS57162432A (en) 1981-03-31 1981-03-31 Mound crushing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4801581A JPS57162432A (en) 1981-03-31 1981-03-31 Mound crushing unit

Publications (1)

Publication Number Publication Date
JPS57162432A true JPS57162432A (en) 1982-10-06

Family

ID=12791476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4801581A Pending JPS57162432A (en) 1981-03-31 1981-03-31 Mound crushing unit

Country Status (1)

Country Link
JP (1) JPS57162432A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196534U (en) * 1984-11-30 1986-06-21
JPS61104542U (en) * 1984-12-13 1986-07-03
JPS61183526U (en) * 1985-05-09 1986-11-15

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375869A (en) * 1976-12-17 1978-07-05 Nec Corp Semiconductor wafer exposure apparatus
JPS54116881A (en) * 1978-03-02 1979-09-11 Nec Corp Surface processor for semiconductor wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375869A (en) * 1976-12-17 1978-07-05 Nec Corp Semiconductor wafer exposure apparatus
JPS54116881A (en) * 1978-03-02 1979-09-11 Nec Corp Surface processor for semiconductor wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6196534U (en) * 1984-11-30 1986-06-21
JPS61104542U (en) * 1984-12-13 1986-07-03
JPS61183526U (en) * 1985-05-09 1986-11-15

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