JPS57162050A - Exclusive control system - Google Patents
Exclusive control systemInfo
- Publication number
- JPS57162050A JPS57162050A JP56047424A JP4742481A JPS57162050A JP S57162050 A JPS57162050 A JP S57162050A JP 56047424 A JP56047424 A JP 56047424A JP 4742481 A JP4742481 A JP 4742481A JP S57162050 A JPS57162050 A JP S57162050A
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- adaptors
- comparison
- memory data
- exclusive control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Hardware Redundancy (AREA)
Abstract
PURPOSE:To prevent breakdown of a data due to careless accessing, to quickly incorporate it into a system whose repair is completed, and to continue input and output operations of the other system, by holding an exclusive control information continuously. CONSTITUTION:This system is provided with plural controllers #1, #2, adaptors #1, #2 and input/output devices, exclusive control memories #1, #2 are connected between the respective adaptors #1, #2, and control information is held by the respective control memories #1, #2. A common signal line controlling circuit is provided on these adaptors #1, #2, respectively, and each signal line controlling circuit is connected by a common signal line. In this state, when one control system is faulty, an inhibiting signal of comparison of memory data is sent to the adaptor #1 or #2 of the other system through the common signal line, and comparison of memory data is stopped. After the fault has been repaired, a copying start signal of the memory #1 or #2, a memory data request signal and a comparison inhibition release signal are sent, and the regular operation is recovered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56047424A JPS57162050A (en) | 1981-03-31 | 1981-03-31 | Exclusive control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56047424A JPS57162050A (en) | 1981-03-31 | 1981-03-31 | Exclusive control system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57162050A true JPS57162050A (en) | 1982-10-05 |
| JPS6125175B2 JPS6125175B2 (en) | 1986-06-14 |
Family
ID=12774767
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56047424A Granted JPS57162050A (en) | 1981-03-31 | 1981-03-31 | Exclusive control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57162050A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5977563A (en) * | 1982-10-26 | 1984-05-04 | Nec Corp | File control processor |
| JPS59177666A (en) * | 1983-03-28 | 1984-10-08 | Toshiba Corp | Dual bulk controller |
| JPS605329A (en) * | 1983-06-23 | 1985-01-11 | Fujitsu Ltd | Managing system of duplex disk |
| JPS6349857A (en) * | 1986-08-19 | 1988-03-02 | Nec Corp | File controller |
| JPH0212448A (en) * | 1988-06-30 | 1990-01-17 | Toshiba Corp | Composite electronic computer system |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH075764U (en) * | 1993-06-30 | 1995-01-27 | 宝文社印刷株式会社 | Message sheet for backing photos |
-
1981
- 1981-03-31 JP JP56047424A patent/JPS57162050A/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5977563A (en) * | 1982-10-26 | 1984-05-04 | Nec Corp | File control processor |
| JPS59177666A (en) * | 1983-03-28 | 1984-10-08 | Toshiba Corp | Dual bulk controller |
| JPS605329A (en) * | 1983-06-23 | 1985-01-11 | Fujitsu Ltd | Managing system of duplex disk |
| JPS6349857A (en) * | 1986-08-19 | 1988-03-02 | Nec Corp | File controller |
| JPH0212448A (en) * | 1988-06-30 | 1990-01-17 | Toshiba Corp | Composite electronic computer system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6125175B2 (en) | 1986-06-14 |
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