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JPS5462743A - Communication control system - Google Patents

Communication control system

Info

Publication number
JPS5462743A
JPS5462743A JP12926677A JP12926677A JPS5462743A JP S5462743 A JPS5462743 A JP S5462743A JP 12926677 A JP12926677 A JP 12926677A JP 12926677 A JP12926677 A JP 12926677A JP S5462743 A JPS5462743 A JP S5462743A
Authority
JP
Japan
Prior art keywords
data
rom13
cpu11
ccm12
ram14
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12926677A
Other languages
Japanese (ja)
Inventor
Norimoto Tsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12926677A priority Critical patent/JPS5462743A/en
Publication of JPS5462743A publication Critical patent/JPS5462743A/en
Pending legal-status Critical Current

Links

Landscapes

  • Computer And Data Communications (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE: To prevent the timing error of a communication control module exclusively using a bus equpping the communication module with a ROM stored with firmware and a local memory temporarily stored with data.
CONSTITUTION: Once data are transmitted from CPU11, ROM13 of communication controller CCM12 checks whether or not the data are normal and then writes them to local memory RAM, and after the data, ROM13 uses the bus exclusively to write the contents of RAM14 to main memory unit MMU15 via control line 16. If data are transmitted from circuit 18 when CPU11 transmits no command to CCM12, the data are transferred from RAM14 to MMU8 and then, the firmware stored in ROM13 exercises control so that CCM18 will cause a request interruption to CPU11.
COPYRIGHT: (C)1979,JPO&Japio
JP12926677A 1977-10-28 1977-10-28 Communication control system Pending JPS5462743A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12926677A JPS5462743A (en) 1977-10-28 1977-10-28 Communication control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12926677A JPS5462743A (en) 1977-10-28 1977-10-28 Communication control system

Publications (1)

Publication Number Publication Date
JPS5462743A true JPS5462743A (en) 1979-05-21

Family

ID=15005316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12926677A Pending JPS5462743A (en) 1977-10-28 1977-10-28 Communication control system

Country Status (1)

Country Link
JP (1) JPS5462743A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60120452A (en) * 1983-12-02 1985-06-27 Advantest Corp Data transmitting device
JPS62152244A (en) * 1985-12-26 1987-07-07 Yamatake Honeywell Co Ltd Communication control method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60120452A (en) * 1983-12-02 1985-06-27 Advantest Corp Data transmitting device
JPS62152244A (en) * 1985-12-26 1987-07-07 Yamatake Honeywell Co Ltd Communication control method
JPH0377700B2 (en) * 1985-12-26 1991-12-11 Yamatake Honeywell Co Ltd

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