JPS57117042A - Interruption system of communication control device - Google Patents
Interruption system of communication control deviceInfo
- Publication number
- JPS57117042A JPS57117042A JP56002226A JP222681A JPS57117042A JP S57117042 A JPS57117042 A JP S57117042A JP 56002226 A JP56002226 A JP 56002226A JP 222681 A JP222681 A JP 222681A JP S57117042 A JPS57117042 A JP S57117042A
- Authority
- JP
- Japan
- Prior art keywords
- interruption
- signal line
- time
- timer
- constant interval
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012545 processing Methods 0.000 abstract 5
- 238000009434 installation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Communication Control (AREA)
- Computer And Data Communications (AREA)
Abstract
PURPOSE:To simultaneously process interruption requests from plural terminals, by constituting so that even if an interruption request is received from one of plural terminals, this interruption processing is not executed, and installation time to the interruption processing is shifted by a constant interval of time. CONSTITUTION:A signal line 19 becomes ''1'' by an interruption request of a terminal A, but since an output signal from a timer 16 is ''0'', a signal line 20 remains ''0'', and a processing request to an interruption processing mechanism 15 is not generated. At this time, however, the timer 16 is set through an OR circuit 18 by ''1'' of the signal line 19, and even if interruption requests are generated from a terminal B and C before a constant interval of time passes, a signal line 22 remains ''0''. In this state, when the timer has passed a constant interval of time, a signal line 25 becomes ''1'', the signal lines 20, 22 and 24 become ''1'', and the interruption processings from A-C are executed simultaneously.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002226A JPS57117042A (en) | 1981-01-10 | 1981-01-10 | Interruption system of communication control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56002226A JPS57117042A (en) | 1981-01-10 | 1981-01-10 | Interruption system of communication control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57117042A true JPS57117042A (en) | 1982-07-21 |
Family
ID=11523436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56002226A Pending JPS57117042A (en) | 1981-01-10 | 1981-01-10 | Interruption system of communication control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57117042A (en) |
-
1981
- 1981-01-10 JP JP56002226A patent/JPS57117042A/en active Pending
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