JPS5711526A - Latch circuit - Google Patents
Latch circuitInfo
- Publication number
- JPS5711526A JPS5711526A JP8630980A JP8630980A JPS5711526A JP S5711526 A JPS5711526 A JP S5711526A JP 8630980 A JP8630980 A JP 8630980A JP 8630980 A JP8630980 A JP 8630980A JP S5711526 A JPS5711526 A JP S5711526A
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- power supply
- voltage
- level
- output voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
Abstract
PURPOSE:To automatically set the initial value of a circuit at power supply application to a desired logical level, by connecting a cpapcitor between an inverter input and a grounded terminal or power supply terminal. CONSTITUTION:When a voltage at a power supply terminal 16 is raised from 0 voltage, each IG-FET is at off-state at a range lower than a threshold voltage of the IF-FET. When a V16 is further increased, since V35 V36 is expressed, a Vth6 reaches the threshold voltage of low level of an inverter 6 after time t1. Thus, the V35 increases and the output voltage of an inverter 5 decreases, then an output voltage V34 of an inverter 6 increases to ''1'' level rapidly, and the output voltage V36 of an inverter 5 decreases to ''0'' level rapidly. Thus, the initial value of the output of the latch circuit can be set to ''0'' level at the power supply application.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8630980A JPS5711526A (en) | 1980-06-25 | 1980-06-25 | Latch circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8630980A JPS5711526A (en) | 1980-06-25 | 1980-06-25 | Latch circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5711526A true JPS5711526A (en) | 1982-01-21 |
JPH0245373B2 JPH0245373B2 (en) | 1990-10-09 |
Family
ID=13883226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8630980A Granted JPS5711526A (en) | 1980-06-25 | 1980-06-25 | Latch circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5711526A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59152597A (en) * | 1983-02-18 | 1984-08-31 | Nec Corp | Memory circuit |
US5055706A (en) * | 1986-10-01 | 1991-10-08 | Kabushiki Kaisha Toshiba | Delay circuit that resets after pulse-like noise |
JPH04207810A (en) * | 1990-11-30 | 1992-07-29 | Nec Corp | Flip-flop circuit |
CN105122646A (en) * | 2013-04-12 | 2015-12-02 | 高通股份有限公司 | A flip-flop with reduced retention voltage |
JP2018026575A (en) * | 2009-11-20 | 2018-02-15 | 株式会社半導体エネルギー研究所 | Semiconductor device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6645933B2 (en) * | 2016-08-19 | 2020-02-14 | キオクシア株式会社 | Data latch circuit and semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS488155U (en) * | 1971-06-11 | 1973-01-29 | ||
JPS496379A (en) * | 1972-05-11 | 1974-01-21 | ||
JPS54140444A (en) * | 1978-04-24 | 1979-10-31 | Hitachi Ltd | Ratch circuit |
-
1980
- 1980-06-25 JP JP8630980A patent/JPS5711526A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS488155U (en) * | 1971-06-11 | 1973-01-29 | ||
JPS496379A (en) * | 1972-05-11 | 1974-01-21 | ||
JPS54140444A (en) * | 1978-04-24 | 1979-10-31 | Hitachi Ltd | Ratch circuit |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59152597A (en) * | 1983-02-18 | 1984-08-31 | Nec Corp | Memory circuit |
JPH0241116B2 (en) * | 1983-02-18 | 1990-09-14 | Nippon Electric Co | |
US5055706A (en) * | 1986-10-01 | 1991-10-08 | Kabushiki Kaisha Toshiba | Delay circuit that resets after pulse-like noise |
JPH04207810A (en) * | 1990-11-30 | 1992-07-29 | Nec Corp | Flip-flop circuit |
JP2871087B2 (en) * | 1990-11-30 | 1999-03-17 | 日本電気株式会社 | Flip-flop circuit |
JP2018026575A (en) * | 2009-11-20 | 2018-02-15 | 株式会社半導体エネルギー研究所 | Semiconductor device |
US10505520B2 (en) | 2009-11-20 | 2019-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile latch circuit and logic circuit, and semiconductor device using the same |
CN105122646A (en) * | 2013-04-12 | 2015-12-02 | 高通股份有限公司 | A flip-flop with reduced retention voltage |
JP2016518785A (en) * | 2013-04-12 | 2016-06-23 | クゥアルコム・インコーポレイテッドQualcomm Incorporated | Flip-flop with reduced holding voltage |
CN105122646B (en) * | 2013-04-12 | 2018-09-07 | 高通股份有限公司 | The trigger of reservation voltage with reduction |
Also Published As
Publication number | Publication date |
---|---|
JPH0245373B2 (en) | 1990-10-09 |
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