JPS5521656A - Pulse generation circuit - Google Patents
Pulse generation circuitInfo
- Publication number
- JPS5521656A JPS5521656A JP9478478A JP9478478A JPS5521656A JP S5521656 A JPS5521656 A JP S5521656A JP 9478478 A JP9478478 A JP 9478478A JP 9478478 A JP9478478 A JP 9478478A JP S5521656 A JPS5521656 A JP S5521656A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- reset
- reset pulse
- voltage
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007257 malfunction Effects 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
Landscapes
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To avoid malfunction by ensuring the reset of C-MOS logic circuit, through the delivery of the reset pulse at the power supply application, even at the momentary interruption of power supply voltage and lowering. CONSTITUTION:After the switch 3 is closed by giving the control power supply between the terminals 1 and 2, while the input voltage e3 of the NAND circuit 10 is lower than the threshold voltage eTH, the circuit 10 is inverted and reset pulse is produced from the output terminal 11. The C-MOS logic circuit connected to the terminals 12 and 13 with this pulseis is initially reset at the same time when the power supply is applied. Next, when the power supply is momentarily interrupted for time t1, the reset pulse is made similarly for eTH>e3, and if the power supply is interrupted for time t2 longer than time t1, the reset pulse is similarly generated for eTH>e3. Further, if the voltage of the power supply 4 is lowered from the normal voltage value for a given rate, the reset pulse is produced. Thus, the C-MOS logic circuit can surely be reset to avoid malfunction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9478478A JPS5521656A (en) | 1978-08-02 | 1978-08-02 | Pulse generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9478478A JPS5521656A (en) | 1978-08-02 | 1978-08-02 | Pulse generation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5521656A true JPS5521656A (en) | 1980-02-15 |
JPS6352490B2 JPS6352490B2 (en) | 1988-10-19 |
Family
ID=14119696
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9478478A Granted JPS5521656A (en) | 1978-08-02 | 1978-08-02 | Pulse generation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5521656A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59147328U (en) * | 1983-03-19 | 1984-10-02 | 善工舎時計株式会社 | delay circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0641589U (en) * | 1992-11-16 | 1994-06-03 | 起夫 西田 | Body wash |
-
1978
- 1978-08-02 JP JP9478478A patent/JPS5521656A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59147328U (en) * | 1983-03-19 | 1984-10-02 | 善工舎時計株式会社 | delay circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6352490B2 (en) | 1988-10-19 |
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