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JPS5694670A - Complementary type mis semiconductor device - Google Patents

Complementary type mis semiconductor device

Info

Publication number
JPS5694670A
JPS5694670A JP17201379A JP17201379A JPS5694670A JP S5694670 A JPS5694670 A JP S5694670A JP 17201379 A JP17201379 A JP 17201379A JP 17201379 A JP17201379 A JP 17201379A JP S5694670 A JPS5694670 A JP S5694670A
Authority
JP
Japan
Prior art keywords
type
layer
channel
mis transistor
type mis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17201379A
Other languages
Japanese (ja)
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17201379A priority Critical patent/JPS5694670A/en
Publication of JPS5694670A publication Critical patent/JPS5694670A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent latch-up by providing an n<+> type region between the regions of source, drain and channel and a semiconductor substrate for a P-channel-type MIS transistor and a p<+> type region for an N-channel-type MIS transistor in a similar position, respectively. CONSTITUTION:On an n<+> type Si substrate 1 are formed diffusely an n<+> type layer 2 and a p<+> type layer 3, being separated by the 1st insulating separation layer 4, and the side of the layer 2 is used for the P-channel-type MIS transistor and the side of the layer 3 for the N-channel-type MIS transistor. In this way, the n<+> type layer 2 is positioned as an underlay of the P-channel-type element and the p<+> type layer 3 as that of the N-channel-type element. And, an n<-> type layer 5 to be channel is made to grow on the layer 2, at both ends thereof the p<+> type source region and the drain regions 11 and 12 are provided, and between source and drain regions a gate electrode 9 is provided through the intermediary of a gate insulation film 8. Next, element regions of quite the same structure are also formed on the layer 3 and a gate electrode 10 is fitted thereto. In this way, a carrier caused by alpha rays and the like is eliminated in a short time.
JP17201379A 1979-12-27 1979-12-27 Complementary type mis semiconductor device Pending JPS5694670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17201379A JPS5694670A (en) 1979-12-27 1979-12-27 Complementary type mis semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17201379A JPS5694670A (en) 1979-12-27 1979-12-27 Complementary type mis semiconductor device

Publications (1)

Publication Number Publication Date
JPS5694670A true JPS5694670A (en) 1981-07-31

Family

ID=15933903

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17201379A Pending JPS5694670A (en) 1979-12-27 1979-12-27 Complementary type mis semiconductor device

Country Status (1)

Country Link
JP (1) JPS5694670A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58124269A (en) * 1982-01-21 1983-07-23 Nec Corp Method for manufacturing complementary insulated gate field effect semiconductor device
US4566025A (en) * 1982-06-24 1986-01-21 Rca Corporation CMOS Structure incorporating vertical IGFETS
JPS6159769A (en) * 1984-08-30 1986-03-27 Fujitsu Ltd Manufacture of semiconductor device
US4724221A (en) * 1981-10-28 1988-02-09 U.S. Philips Corporation High-speed, low-power-dissipation integrated circuits
US4725875A (en) * 1985-10-01 1988-02-16 General Electric Co. Memory cell with diodes providing radiation hardness
US4829359A (en) * 1987-05-29 1989-05-09 Harris Corp. CMOS device having reduced spacing between N and P channel
US4916504A (en) * 1983-10-24 1990-04-10 Kabushiki Kaisha Toshiba Three-dimensional CMOS inverter
US5304833A (en) * 1989-09-12 1994-04-19 Mitsubishi Electric Corporation Complementary MOS semiconductor device
WO1997027628A1 (en) * 1996-01-24 1997-07-31 Advanced Micro Devices, Inc. Semiconductor device with self-aligned insulator
US5923985A (en) * 1987-01-05 1999-07-13 Seiko Instruments Inc. MOS field effect transistor and its manufacturing method
US6229188B1 (en) * 1987-01-05 2001-05-08 Seiko Instruments Inc. MOS field effect transistor and its manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5390885A (en) * 1977-01-21 1978-08-10 Nippon Telegr & Teleph Corp <Ntt> Integrated semiconductor device containing mis transistor and its manufacture
JPS5493981A (en) * 1978-01-09 1979-07-25 Toshiba Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5390885A (en) * 1977-01-21 1978-08-10 Nippon Telegr & Teleph Corp <Ntt> Integrated semiconductor device containing mis transistor and its manufacture
JPS5493981A (en) * 1978-01-09 1979-07-25 Toshiba Corp Semiconductor device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4724221A (en) * 1981-10-28 1988-02-09 U.S. Philips Corporation High-speed, low-power-dissipation integrated circuits
JPS58124269A (en) * 1982-01-21 1983-07-23 Nec Corp Method for manufacturing complementary insulated gate field effect semiconductor device
US4566025A (en) * 1982-06-24 1986-01-21 Rca Corporation CMOS Structure incorporating vertical IGFETS
US4916504A (en) * 1983-10-24 1990-04-10 Kabushiki Kaisha Toshiba Three-dimensional CMOS inverter
JPS6159769A (en) * 1984-08-30 1986-03-27 Fujitsu Ltd Manufacture of semiconductor device
US4725875A (en) * 1985-10-01 1988-02-16 General Electric Co. Memory cell with diodes providing radiation hardness
US5923985A (en) * 1987-01-05 1999-07-13 Seiko Instruments Inc. MOS field effect transistor and its manufacturing method
US6229188B1 (en) * 1987-01-05 2001-05-08 Seiko Instruments Inc. MOS field effect transistor and its manufacturing method
US4829359A (en) * 1987-05-29 1989-05-09 Harris Corp. CMOS device having reduced spacing between N and P channel
US5304833A (en) * 1989-09-12 1994-04-19 Mitsubishi Electric Corporation Complementary MOS semiconductor device
WO1997027628A1 (en) * 1996-01-24 1997-07-31 Advanced Micro Devices, Inc. Semiconductor device with self-aligned insulator
US5712173A (en) * 1996-01-24 1998-01-27 Advanced Micro Devices, Inc. Method of making semiconductor device with self-aligned insulator
US5955767A (en) * 1996-01-24 1999-09-21 Advanced Micro Devices, Inc. Semiconductor device with self-aligned insulator

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