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JPS5662336A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS5662336A
JPS5662336A JP13759779A JP13759779A JPS5662336A JP S5662336 A JPS5662336 A JP S5662336A JP 13759779 A JP13759779 A JP 13759779A JP 13759779 A JP13759779 A JP 13759779A JP S5662336 A JPS5662336 A JP S5662336A
Authority
JP
Japan
Prior art keywords
insulator layer
layer
islands
metal wiring
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13759779A
Other languages
Japanese (ja)
Inventor
Masahito Miura
Tadashi Sakagami
Tatsuo Shimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Minebea Power Semiconductor Device Inc
Original Assignee
Hitachi Ltd
Hitachi Haramachi Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Haramachi Electronics Ltd filed Critical Hitachi Ltd
Priority to JP13759779A priority Critical patent/JPS5662336A/en
Publication of JPS5662336A publication Critical patent/JPS5662336A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain a higher dielectric strength charactristic without disconnection of a metal wiring by forming an insulator layer to relax electrid field concentration on portions with no step on the metal wiring side. CONSTITUTION:N<+> islands 3 are formed in a substrate 1 made of a polycrystaline silicon isolated by an insulator layer 2 arranged between islands, a layer 4 and an N<+> layer 5 are formed in the islands, and insulator layers 60 and 61 are provided thereon. The insulator layer 60 is t2 in the thickness and the insulator layer 61, t1 in the thickness. The lower portion of the insulator layer 61 is formed with a step in the N<-> island 3. A window 11 is formed with the insulator layer 60 partially removed, and a metal wiring 7 is provided on the insulator layer 61.
JP13759779A 1979-10-26 1979-10-26 Semiconductor element Pending JPS5662336A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13759779A JPS5662336A (en) 1979-10-26 1979-10-26 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13759779A JPS5662336A (en) 1979-10-26 1979-10-26 Semiconductor element

Publications (1)

Publication Number Publication Date
JPS5662336A true JPS5662336A (en) 1981-05-28

Family

ID=15202413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13759779A Pending JPS5662336A (en) 1979-10-26 1979-10-26 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS5662336A (en)

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