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JPS5658192A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS5658192A
JPS5658192A JP13132979A JP13132979A JPS5658192A JP S5658192 A JPS5658192 A JP S5658192A JP 13132979 A JP13132979 A JP 13132979A JP 13132979 A JP13132979 A JP 13132979A JP S5658192 A JPS5658192 A JP S5658192A
Authority
JP
Japan
Prior art keywords
unbalance
sense amplifier
lines
state
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13132979A
Other languages
Japanese (ja)
Other versions
JPS6051197B2 (en
Inventor
Isao Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP54131329A priority Critical patent/JPS6051197B2/en
Publication of JPS5658192A publication Critical patent/JPS5658192A/en
Publication of JPS6051197B2 publication Critical patent/JPS6051197B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To increase the sensitivity of a sense amplifier for the semiconductor memory device using the sense amplifier consisting of the flip-flop circuit, by detecting and storing the unbalanced state of a pair of inverters forming the sense amplifier and then compensating the unbalance in accordance with the storage. CONSTITUTION:The dynamic RAM actuates the sense amplifier 1 by setting the word line and the clock phi1 to ''0'' and the clock phi2 to ''1'' each at the end of the initialization. The amplifier 1 senses either one of the digit lines 20 and 21 as ''1'' and the other as ''0'' respectively according to the unbalance of the electric characteristics of the system. After this, the clocks phi1 and phi2 are set at ''1'' and ''0'' each, and the unbalance state of the lines 20 and 21 is stored in the static memory cell 31. According to the state of storage, the capacities 34 and 35 are added to the lines 20 and 21 with the degree of unbalance set to the 1/2 capacity value in a conversion of the digit line capacity. As a result, the unbalance of voltage can be dissolved to increase the sensitivity.
JP54131329A 1979-10-13 1979-10-13 semiconductor storage device Expired JPS6051197B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54131329A JPS6051197B2 (en) 1979-10-13 1979-10-13 semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54131329A JPS6051197B2 (en) 1979-10-13 1979-10-13 semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS5658192A true JPS5658192A (en) 1981-05-21
JPS6051197B2 JPS6051197B2 (en) 1985-11-12

Family

ID=15055394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54131329A Expired JPS6051197B2 (en) 1979-10-13 1979-10-13 semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS6051197B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58102389A (en) * 1981-12-12 1983-06-17 Nippon Telegr & Teleph Corp <Ntt> Storage circuit
JPS58121194A (en) * 1982-01-11 1983-07-19 Nippon Telegr & Teleph Corp <Ntt> Memory circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58102389A (en) * 1981-12-12 1983-06-17 Nippon Telegr & Teleph Corp <Ntt> Storage circuit
JPS58121194A (en) * 1982-01-11 1983-07-19 Nippon Telegr & Teleph Corp <Ntt> Memory circuit

Also Published As

Publication number Publication date
JPS6051197B2 (en) 1985-11-12

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