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JPS5657145A - Microprogram control device - Google Patents

Microprogram control device

Info

Publication number
JPS5657145A
JPS5657145A JP13282279A JP13282279A JPS5657145A JP S5657145 A JPS5657145 A JP S5657145A JP 13282279 A JP13282279 A JP 13282279A JP 13282279 A JP13282279 A JP 13282279A JP S5657145 A JPS5657145 A JP S5657145A
Authority
JP
Japan
Prior art keywords
instruction
speed
execution
memory
micro
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13282279A
Other languages
Japanese (ja)
Inventor
Koji Takao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13282279A priority Critical patent/JPS5657145A/en
Publication of JPS5657145A publication Critical patent/JPS5657145A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make instruction execution high-speed for request of the instruction iterative operation, by storing the micro instruction into a high-speed memory in parallel with read execution of the micro instruction.
CONSTITUTION: Mirco instruction (b) read out from memory 11 is given to decode circuit 15 and is decoded and executed. In parallel with decoding and execution, this micro instruction is written into high-speed memory 12. The state of signal (f) is change when circuit 15 decodes a special instruction, and after that, memory 12 becomes the read state, and selecting circuit 14 becomes the execution state of micro instruction (c). Clock supply circuit 17 supplies high-speed machine clocks. Micro instructions following micro instruction (c) are taken out from memory 12, and micro instructions executed previously are executed repeatedly in the high-speed machine cycle. As a result, instructions can be executed in a high speed for the iterative routine requiring high-speed execution with cheap hardware.
COPYRIGHT: (C)1981,JPO&Japio
JP13282279A 1979-10-17 1979-10-17 Microprogram control device Pending JPS5657145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13282279A JPS5657145A (en) 1979-10-17 1979-10-17 Microprogram control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13282279A JPS5657145A (en) 1979-10-17 1979-10-17 Microprogram control device

Publications (1)

Publication Number Publication Date
JPS5657145A true JPS5657145A (en) 1981-05-19

Family

ID=15090364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13282279A Pending JPS5657145A (en) 1979-10-17 1979-10-17 Microprogram control device

Country Status (1)

Country Link
JP (1) JPS5657145A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5882342A (en) * 1981-11-11 1983-05-17 Nec Corp Microprogram controller
JPS58119052A (en) * 1982-01-08 1983-07-15 Nec Corp Microprogram control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5882342A (en) * 1981-11-11 1983-05-17 Nec Corp Microprogram controller
JPS58119052A (en) * 1982-01-08 1983-07-15 Nec Corp Microprogram control system

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