JPS5654681A - Decoding circuit - Google Patents
Decoding circuitInfo
- Publication number
- JPS5654681A JPS5654681A JP13014479A JP13014479A JPS5654681A JP S5654681 A JPS5654681 A JP S5654681A JP 13014479 A JP13014479 A JP 13014479A JP 13014479 A JP13014479 A JP 13014479A JP S5654681 A JPS5654681 A JP S5654681A
- Authority
- JP
- Japan
- Prior art keywords
- address input
- decoding
- bits
- output
- word line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
PURPOSE:To reduce great amount of power consumption, by change-over the switching signal with the address input signal, dividing the output of a single unit of the decoder into the plural parts and thus securing the decoding function assigned for every plural number. CONSTITUTION:The switching signals X1-X4 are obtained through the NOR gate as well as the logic inverter of X1=A5-A6, X2=-A5, A6, X3=-A5, -A6 and X4=A5, A6 and via A5 and -A6 equivalent to 2 bits within the address input. In such way, the allotment is secured to one of the four through the NOR gate type decoder and in correspondence to the address input of 5 bits. As a result, the decoding output of 32X4=128 can be obtained. The output node of each decoding is supplied to the word line driving terminal of the static memory after receiving the sufficient driving capacity via each of the buffers AP1-AP128. Thus the address input of 7 bits yields the 128 pieces of decoding outputs can be obtained for selection of the word line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13014479A JPS5654681A (en) | 1979-10-09 | 1979-10-09 | Decoding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13014479A JPS5654681A (en) | 1979-10-09 | 1979-10-09 | Decoding circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5654681A true JPS5654681A (en) | 1981-05-14 |
JPS6235190B2 JPS6235190B2 (en) | 1987-07-31 |
Family
ID=15027017
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13014479A Granted JPS5654681A (en) | 1979-10-09 | 1979-10-09 | Decoding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5654681A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059588A (en) * | 1983-09-12 | 1985-04-05 | Hitachi Ltd | Semiconductor storage device |
JPS61237294A (en) * | 1985-04-12 | 1986-10-22 | Hitachi Ltd | Dynamic type ram |
JPS62117187A (en) * | 1985-11-15 | 1987-05-28 | Mitsubishi Electric Corp | Two-ports semiconductor memory device |
JPS63285793A (en) * | 1987-05-18 | 1988-11-22 | Mitsubishi Electric Corp | Decoder circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS528739A (en) * | 1975-07-10 | 1977-01-22 | Fujitsu Ltd | Electronic circuit |
-
1979
- 1979-10-09 JP JP13014479A patent/JPS5654681A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS528739A (en) * | 1975-07-10 | 1977-01-22 | Fujitsu Ltd | Electronic circuit |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059588A (en) * | 1983-09-12 | 1985-04-05 | Hitachi Ltd | Semiconductor storage device |
JPH0568040B2 (en) * | 1983-09-12 | 1993-09-28 | Hitachi Ltd | |
JPS61237294A (en) * | 1985-04-12 | 1986-10-22 | Hitachi Ltd | Dynamic type ram |
JPS62117187A (en) * | 1985-11-15 | 1987-05-28 | Mitsubishi Electric Corp | Two-ports semiconductor memory device |
JPS63285793A (en) * | 1987-05-18 | 1988-11-22 | Mitsubishi Electric Corp | Decoder circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6235190B2 (en) | 1987-07-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5570993A (en) | Memory circuit | |
JPS5325324A (en) | Address selection system | |
GB1392530A (en) | Address decode logic system | |
GB1402444A (en) | Semiconductor memory | |
US5388073A (en) | Semiconductor integrated circuit device and digital processor employing the same | |
JPS56111194A (en) | Semiconductor memory | |
JPS5654681A (en) | Decoding circuit | |
JPS5585957A (en) | Logic circuit for test bit selection | |
JPS5619584A (en) | Semiconductor memory | |
GB981296A (en) | Improvements in or relating to digital registers | |
JPS5647996A (en) | Semiconductor memory device | |
US4868788A (en) | Semiconductor memory device with improved word line drive circuit | |
JPS6452300A (en) | Semiconductor memory device | |
JPS5720841A (en) | Memory controlling circuit | |
JPS5525840A (en) | Decoder circuit | |
JPS57195381A (en) | Semiconductor memory | |
JPS5271141A (en) | Word line driving circuit | |
JPS5782288A (en) | Dynamic memory | |
JPS5611506A (en) | Sequence controller | |
JPS6418854A (en) | Address converting circuit for picture memory | |
JPS54106128A (en) | Time-division display unit | |
JPS6472230A (en) | Bit inverter | |
JPS55147039A (en) | Logic circuit | |
JPS54122944A (en) | Logic circuit | |
JPS5730058A (en) | Career information memory storage system |