JPS564272A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS564272A JPS564272A JP7919779A JP7919779A JPS564272A JP S564272 A JPS564272 A JP S564272A JP 7919779 A JP7919779 A JP 7919779A JP 7919779 A JP7919779 A JP 7919779A JP S564272 A JPS564272 A JP S564272A
- Authority
- JP
- Japan
- Prior art keywords
- region
- type
- oxide film
- diffused
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/30—Devices controlled by electric currents or voltages
- H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H10D48/34—Bipolar devices
- H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To obtain a transistor which has low noise and high amplification characteristics by diffusing a base region in a semiconductor substrate with an oxide film as a mask, removing the surface layer of the base region containing lowered impurity density when forming an emitter region in the base region and forming the emitter region therein. CONSTITUTION:An n<+>-type layer 7 becoming a collector region is diffused in the back surface of an n<->-type Si substrate 1, and a p-type impurity is deposited on the surface of the substrate 1 with an oxide film 8 having an opening as a mask. When it is then extention diffused to form a p-type base region 2 therein, impurity is partly absorbed into the film 8 to lower the density on the surface of the region 2. Therefore, an opening is perforated at the oxide film 8' thus produced to etch it so as to form a recess in the region 2, and an oxide film 8'' is again coated thereon so that the recess becomes peak density. Thereafter, an opening 10 is again perforated at the film 8'', an n<+>-type emitter region 3 is diffused corresponding to the peak position, and electrodes 11-13 are then mounted on the respective regions.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7919779A JPS564272A (en) | 1979-06-25 | 1979-06-25 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7919779A JPS564272A (en) | 1979-06-25 | 1979-06-25 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS564272A true JPS564272A (en) | 1981-01-17 |
Family
ID=13683235
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7919779A Pending JPS564272A (en) | 1979-06-25 | 1979-06-25 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS564272A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61142882U (en) * | 1985-02-26 | 1986-09-03 |
-
1979
- 1979-06-25 JP JP7919779A patent/JPS564272A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61142882U (en) * | 1985-02-26 | 1986-09-03 |
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